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authorRichard Henderson <richard.henderson@linaro.org>2023-04-24 04:29:40 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-05-11 09:53:41 +0100
commit2f2a3d1d0b11416aa39cd6127d9632318c7e345b (patch)
treef5992575e07c0da7b0eb15001ed2961af153c4df /replication.c
parenta79956219f264945d06a540387a8f72f5ba4953b (diff)
tcg/mips: Reorg tlb load within prepare_host_addr
Compare the address vs the tlb entry with sign-extended values. This simplifies the page+alignment mask constant, and the generation of the last byte address for the misaligned test. Move the tlb addend load up, and the zero-extension down. This frees up a register, which allows us use TMP3 as the returned base address register instead of A0, which we were using as a 5th temporary. Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'replication.c')
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