diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2011-10-10 14:48:23 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-10-15 21:38:07 +0000 |
| commit | 3aeaea654afb1b45a99798f87c143392b2994712 (patch) | |
| tree | cff14d722b1820e6247db8cf1ae7405705d614eb /qemu-tech.texi | |
| parent | e7e9af5c822bdeee65a55c14299a71898d151287 (diff) | |
target-xtensa: update qemu-doc.texi
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Diffstat (limited to 'qemu-tech.texi')
| -rw-r--r-- | qemu-tech.texi | 40 |
1 files changed, 33 insertions, 7 deletions
diff --git a/qemu-tech.texi b/qemu-tech.texi index 138e3ce9ad..397b070842 100644 --- a/qemu-tech.texi +++ b/qemu-tech.texi @@ -42,13 +42,14 @@ @chapter Introduction @menu -* intro_features:: Features -* intro_x86_emulation:: x86 and x86-64 emulation -* intro_arm_emulation:: ARM emulation -* intro_mips_emulation:: MIPS emulation -* intro_ppc_emulation:: PowerPC emulation -* intro_sparc_emulation:: Sparc32 and Sparc64 emulation -* intro_other_emulation:: Other CPU emulation +* intro_features:: Features +* intro_x86_emulation:: x86 and x86-64 emulation +* intro_arm_emulation:: ARM emulation +* intro_mips_emulation:: MIPS emulation +* intro_ppc_emulation:: PowerPC emulation +* intro_sparc_emulation:: Sparc32 and Sparc64 emulation +* intro_xtensa_emulation:: Xtensa emulation +* intro_other_emulation:: Other CPU emulation @end menu @node intro_features @@ -259,6 +260,31 @@ Current QEMU limitations: @end itemize +@node intro_xtensa_emulation +@section Xtensa emulation + +@itemize + +@item Core Xtensa ISA emulation, including most options: code density, +loop, extended L32R, 16- and 32-bit multiplication, 32-bit division, +MAC16, miscellaneous operations, boolean, multiprocessor synchronization, +conditional store, exceptions, relocatable vectors, unaligned exception, +interrupts (including high priority and timer), hardware alignment, +region protection, region translation, MMU, windowed registers, thread +pointer, processor ID. + +@item Not implemented options: FP coprocessor, coprocessor context, +data/instruction cache (including cache prefetch and locking), XLMI, +processor interface, debug. Also options not covered by the core ISA +(e.g. FLIX, wide branches) are not implemented. + +@item Can run most Xtensa Linux binaries. + +@item New core configuration that requires no additional instructions +may be created from overlay with minimal amount of hand-written code. + +@end itemize + @node intro_other_emulation @section Other CPU emulation |