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authorbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-07-02 14:31:34 +0000
committerbellard <bellard@c046a42c-6fe2-441c-8c8c-71466251a162>2005-07-02 14:31:34 +0000
commit3475187dd814be9b27c4632b59c1e3c76d966d63 (patch)
treed9936e5d6491dfd61627ab5c0134eb8910caa98d /qemu-tech.texi
parent8979b2277d92d0acd0fd3be523a7515f86f79bec (diff)
sparc64 marge (Blue Swirl)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1462 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'qemu-tech.texi')
-rw-r--r--qemu-tech.texi27
1 files changed, 25 insertions, 2 deletions
diff --git a/qemu-tech.texi b/qemu-tech.texi
index c86094b7c6..379cbad557 100644
--- a/qemu-tech.texi
+++ b/qemu-tech.texi
@@ -138,9 +138,32 @@ FPU and MMU.
@itemize
@item Somewhat complete SPARC V8 emulation, including privileged
-instructions, FPU and MMU.
+instructions, FPU and MMU. SPARC V9 emulation includes most privileged
+instructions, FPU and I/D MMU, but misses VIS instructions.
-@item Can run some SPARC Linux binaries.
+@item Can run some 32-bit SPARC Linux binaries.
+
+@end itemize
+
+Current QEMU limitations:
+
+@itemize
+
+@item Tagged add/subtract instructions are not supported, but they are
+probably not used.
+
+@item IPC syscalls are missing.
+
+@item 128-bit floating point operations are not supported, though none of the
+real CPUs implement them either. FCMPE[SD] are not correctly
+implemented. Floating point exception support is untested.
+
+@item Alignment is not enforced at all.
+
+@item Atomic instructions are not correctly implemented.
+
+@item Sparc64 emulators are not usable for anything yet.
+Address space is limited to first 4 gigabytes.
@end itemize