diff options
| author | Stefan Hajnoczi <stefanha@redhat.com> | 2023-11-14 10:48:25 -0500 |
|---|---|---|
| committer | Stefan Hajnoczi <stefanha@redhat.com> | 2023-11-14 10:48:26 -0500 |
| commit | 315088134fe82eabbf2e91e1a7644aa3e0573c03 (patch) | |
| tree | 63ba2517967608d35ba2c7c0b624e4d50fda62a3 /qemu-io.c | |
| parent | f78ea7ddb0e18766ece9fdfe02061744a7afc41b (diff) | |
| parent | f88131d931219bf76bb1bbf3bd8d6ca941a91ae3 (diff) | |
Merge tag 'pull-pa-20231113' of https://gitlab.com/rth7680/qemu into staging
target/hppa: Mask reserved PSW bits in expand_sm_imm
target/hppa: Fix calculation of CR_IIASQ back register
target/hppa: Fix possible overflow in TLB size calculation
target/hppa: Fix probe instruction
target/hppa: Split MMU_PHYS_IDX to MMU_ABS_IDX, MMU_ABS_W_IDX
target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40
hw/pci-host/astro: Translate 32-bit pci onto 40-bit runway bus
hw/hppa: Update SeaBIOS-hppa to version 12
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* tag 'pull-pa-20231113' of https://gitlab.com/rth7680/qemu:
hw/hppa: Require at least SeaBIOS-hppa version 12
target/hppa: Update to SeaBIOS-hppa from version 10 to 12
hw/hppa: Move software power button address to page zero
hw/pci-host/astro: Fix boot for C3700 machine
target/hppa: Reduce TARGET_PHYS_ADDR_SPACE_BITS to 40
target/hppa: Replace MMU_PHYS_IDX with MMU_ABS_IDX, MMU_ABS_W_IDX
target/hppa: Introduce MMU_IDX_MMU_DISABLED
target/hppa: Fix possible overflow in TLB size calculation
target/hppa: Fix calculation of CR_IIASQ back register
target/hppa: Use PRIV_P_TO_MMU_IDX in helper_probe
target/hppa: Use only low 2 immediate bits for PROBEI
target/hppa: Mask reserved PSW bits in expand_sm_imm
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'qemu-io.c')
0 files changed, 0 insertions, 0 deletions