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author | Stefan Hajnoczi <stefanha@redhat.com> | 2017-05-05 16:21:00 +0100 |
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committer | Stefan Hajnoczi <stefanha@redhat.com> | 2017-05-05 16:21:16 +0100 |
commit | 317134bb54bbaf13548c35d92cb00c650a18e32f (patch) | |
tree | 0b9f925b0bc5b30fa7bd0fc338462c147521c193 /linux-user/signal.c | |
parent | 4f3652b3aa5f77582c94ac434e960db242430eac (diff) | |
parent | f4d1414a9385e3375d9107b29eeb75d27daf2147 (diff) |
Merge remote-tracking branch 'shorne/tags/pull-or-20170504' into staging
Openrisc Features and Fixes for qemu 2.10
# gpg: Signature made Thu 04 May 2017 01:41:45 AM BST
# gpg: using RSA key 0xC3B31C2D5E6627E4
# gpg: Good signature from "Stafford Horne <shorne@gmail.com>"
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: D9C4 7354 AEF8 6C10 3A25 EFF1 C3B3 1C2D 5E66 27E4
* shorne/tags/pull-or-20170504:
target/openrisc: Support non-busy idle state using PMR SPR
target/openrisc: Remove duplicate features property
target/openrisc: Implement full vmstate serialization
migration: Add VMSTATE_STRUCT_2DARRAY()
target/openrisc: implement shadow registers
migration: Add VMSTATE_UINTTL_2DARRAY()
target/openrisc: add numcores and coreid support
target/openrisc: Fixes for memory debugging
target/openrisc: Implement EPH bit
target/openrisc: Implement EVBAR register
MAINTAINERS: Add myself as openrisc maintainer
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'linux-user/signal.c')
-rw-r--r-- | linux-user/signal.c | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/linux-user/signal.c b/linux-user/signal.c index a67db04e1a..3d18d1b3ee 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -4411,7 +4411,7 @@ static void setup_sigcontext(struct target_sigcontext *sc, CPUOpenRISCState *regs, unsigned long mask) { - unsigned long usp = regs->gpr[1]; + unsigned long usp = cpu_get_gpr(regs, 1); /* copy the regs. they are first in sc so we can use sc directly */ @@ -4436,7 +4436,7 @@ static inline abi_ulong get_sigframe(struct target_sigaction *ka, CPUOpenRISCState *regs, size_t frame_size) { - unsigned long sp = regs->gpr[1]; + unsigned long sp = cpu_get_gpr(regs, 1); int onsigstack = on_sig_stack(sp); /* redzone */ @@ -4489,7 +4489,8 @@ static void setup_rt_frame(int sig, struct target_sigaction *ka, __put_user(0, &frame->uc.tuc_link); __put_user(target_sigaltstack_used.ss_sp, &frame->uc.tuc_stack.ss_sp); - __put_user(sas_ss_flags(env->gpr[1]), &frame->uc.tuc_stack.ss_flags); + __put_user(sas_ss_flags(cpu_get_gpr(env, 1)), + &frame->uc.tuc_stack.ss_flags); __put_user(target_sigaltstack_used.ss_size, &frame->uc.tuc_stack.ss_size); setup_sigcontext(&frame->sc, env, set->sig[0]); @@ -4512,13 +4513,13 @@ static void setup_rt_frame(int sig, struct target_sigaction *ka, /* Set up registers for signal handler */ env->pc = (unsigned long)ka->_sa_handler; /* what we enter NOW */ - env->gpr[9] = (unsigned long)return_ip; /* what we enter LATER */ - env->gpr[3] = (unsigned long)sig; /* arg 1: signo */ - env->gpr[4] = (unsigned long)&frame->info; /* arg 2: (siginfo_t*) */ - env->gpr[5] = (unsigned long)&frame->uc; /* arg 3: ucontext */ + cpu_set_gpr(env, 9, (unsigned long)return_ip); /* what we enter LATER */ + cpu_set_gpr(env, 3, (unsigned long)sig); /* arg 1: signo */ + cpu_set_gpr(env, 4, (unsigned long)&frame->info); /* arg 2: (siginfo_t*) */ + cpu_set_gpr(env, 5, (unsigned long)&frame->uc); /* arg 3: ucontext */ /* actually move the usp to reflect the stacked frame */ - env->gpr[1] = (unsigned long)frame; + cpu_set_gpr(env, 1, (unsigned long)frame); return; |