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| author | Stephen Checkoway <stephen.checkoway@oberlin.edu> | 2019-04-26 12:26:22 -0400 |
|---|---|---|
| committer | Philippe Mathieu-Daudé <philmd@redhat.com> | 2019-07-02 02:34:55 +0200 |
| commit | a50547aca54c0e55122c32c077cab747147a6b30 (patch) | |
| tree | 06bb127d06cf041211cc6f04e0364cf563b7d5c0 /linux-user/mips/cpu_loop.c | |
| parent | a97910423975b9fee1dbcdc1a2488804d4092c36 (diff) | |
hw/block/pflash_cfi02: Implement multi-sector erase
After two unlock cycles and a sector erase command, the AMD flash chips
start a 50 us erase time out. Any additional sector erase commands add a
sector to be erased and restart the 50 us timeout. During the timeout,
status bit DQ3 is cleared. After the time out, DQ3 is asserted during
erasure.
Signed-off-by: Stephen Checkoway <stephen.checkoway@oberlin.edu>
Message-Id: <20190426162624.55977-9-stephen.checkoway@oberlin.edu>
Acked-by: Thomas Huth <thuth@redhat.com>
Acked-by: Philippe Mathieu-Daudé <philmd@redhat.com>
[PMD: Rebased]
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Diffstat (limited to 'linux-user/mips/cpu_loop.c')
0 files changed, 0 insertions, 0 deletions