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authorPeter Maydell <peter.maydell@linaro.org>2021-06-25 17:05:22 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-06-25 17:05:22 +0100
commite3955ae93f5151ad2e982440b7c8d3776a9afee2 (patch)
tree355a6ea83d17c09ba98cedbab0330e316d43e53d /include/hw/timer/ibex_timer.h
parent3593b8e0a2146a885f93d71c754757bb2c03864e (diff)
parent3ef6434409c575e11faf537ce50ca05426c78940 (diff)
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20210624-2' into staging
Third RISC-V PR for 6.1 release - Fix MISA in the DisasContext - Fix GDB CSR XML generation - QOMify the SiFive UART - Add support for the OpenTitan timer # gpg: Signature made Thu 24 Jun 2021 13:00:26 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20210624-2: hw/riscv: OpenTitan: Connect the mtime and mtimecmp timer hw/timer: Initial commit of Ibex Timer hw/char/ibex_uart: Make the register layout private hw/char: QOMify sifive_uart hw/char: Consistent function names for sifive_uart target/riscv: gdbstub: Fix dynamic CSR XML generation target/riscv: Use target_ulong for the DisasContext misa Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/timer/ibex_timer.h')
-rw-r--r--include/hw/timer/ibex_timer.h52
1 files changed, 52 insertions, 0 deletions
diff --git a/include/hw/timer/ibex_timer.h b/include/hw/timer/ibex_timer.h
new file mode 100644
index 0000000000..6a43537003
--- /dev/null
+++ b/include/hw/timer/ibex_timer.h
@@ -0,0 +1,52 @@
+/*
+ * QEMU lowRISC Ibex Timer device
+ *
+ * Copyright (c) 2021 Western Digital
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef HW_IBEX_TIMER_H
+#define HW_IBEX_TIMER_H
+
+#include "hw/sysbus.h"
+
+#define TYPE_IBEX_TIMER "ibex-timer"
+OBJECT_DECLARE_SIMPLE_TYPE(IbexTimerState, IBEX_TIMER)
+
+struct IbexTimerState {
+ /* <private> */
+ SysBusDevice parent_obj;
+
+ /* <public> */
+ MemoryRegion mmio;
+
+ uint32_t timer_ctrl;
+ uint32_t timer_cfg0;
+ uint32_t timer_compare_lower0;
+ uint32_t timer_compare_upper0;
+ uint32_t timer_intr_enable;
+ uint32_t timer_intr_state;
+ uint32_t timer_intr_test;
+
+ uint32_t timebase_freq;
+
+ qemu_irq irq;
+};
+#endif /* HW_IBEX_TIMER_H */