diff options
author | Alistair Francis <alistair.francis@wdc.com> | 2021-10-22 16:01:30 +1000 |
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committer | Alistair Francis <alistair.francis@wdc.com> | 2021-10-28 14:39:23 +1000 |
commit | bf357e1d72cd8b7b590518dacdf4b65beb2c61e2 (patch) | |
tree | de9048d963d3ad62e876083564fa2189b1079e6d /include/hw/riscv | |
parent | 9925c8bb81d34339ea0433192fdb1d58c12b8edb (diff) |
hw/riscv: boot: Add a PLIC config string function
Add a generic function that can create the PLIC strings.
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Message-id: 20211022060133.3045020-2-alistair.francis@opensource.wdc.com
Diffstat (limited to 'include/hw/riscv')
-rw-r--r-- | include/hw/riscv/boot.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/hw/riscv/boot.h b/include/hw/riscv/boot.h index 0e89400b09..baff11dd8a 100644 --- a/include/hw/riscv/boot.h +++ b/include/hw/riscv/boot.h @@ -31,6 +31,8 @@ bool riscv_is_32bit(RISCVHartArrayState *harts); +char *riscv_plic_hart_config_string(int hart_count); + target_ulong riscv_calc_kernel_start_addr(RISCVHartArrayState *harts, target_ulong firmware_end_addr); target_ulong riscv_find_and_load_firmware(MachineState *machine, |