diff options
| author | Aravinda Prasad <arawinda.p@gmail.com> | 2020-01-31 00:14:19 +0530 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2020-02-03 11:33:10 +1100 |
| commit | 9ac703ac5f9e830ab96d38dc77061bd4be76cf60 (patch) | |
| tree | d8cf1c090e3b6329d842ca87a61dfa8cbe600317 /include/hw/ppc/spapr.h | |
| parent | 9d953ce44722eeb10d99c814478065bebbf7e1f6 (diff) | |
target/ppc: Handle NMI guest exit
Memory error such as bit flips that cannot be corrected
by hardware are passed on to the kernel for handling.
If the memory address in error belongs to guest then
the guest kernel is responsible for taking suitable action.
Patch [1] enhances KVM to exit guest with exit reason
set to KVM_EXIT_NMI in such cases. This patch handles
KVM_EXIT_NMI exit.
[1] https://www.spinics.net/lists/kvm-ppc/msg12637.html
(e20bbd3d and related commits)
Signed-off-by: Aravinda Prasad <arawinda.p@gmail.com>
Signed-off-by: Ganesh Goudar <ganeshgr@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Reviewed-by: Greg Kurz <groug@kaod.org>
Message-Id: <20200130184423.20519-4-ganeshgr@linux.ibm.com>
[dwg: #ifdefs to fix compile for 32-bit target]
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Diffstat (limited to 'include/hw/ppc/spapr.h')
| -rw-r--r-- | include/hw/ppc/spapr.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 7bc5fc3a9e..909d3976f9 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -191,6 +191,15 @@ struct SpaprMachineState { * occurs during the unplug process. */ QTAILQ_HEAD(, SpaprDimmState) pending_dimm_unplugs; + /* State related to "ibm,nmi-register" and "ibm,nmi-interlock" calls */ + target_ulong guest_machine_check_addr; + /* + * mc_status is set to -1 if mc is not in progress, else is set to the CPU + * handling the mc. + */ + int mc_status; + QemuCond mc_delivery_cond; + /*< public >*/ char *kvm_type; char *host_model; @@ -804,6 +813,7 @@ void spapr_clear_pending_events(SpaprMachineState *spapr); int spapr_max_server_number(SpaprMachineState *spapr); void spapr_store_hpte(PowerPCCPU *cpu, hwaddr ptex, uint64_t pte0, uint64_t pte1); +void spapr_mce_req_event(PowerPCCPU *cpu); /* DRC callbacks. */ void spapr_core_release(DeviceState *dev); |