diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2024-06-17 09:20:05 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2024-06-17 09:20:05 -0700 |
| commit | 79e6ec66ba1067a135394a330fec14b50cf49534 (patch) | |
| tree | b07c88302a3d803f5a47a3fc60c6b7aa5cbd192b /include/hw/intc | |
| parent | 05ad1440b8428b0ade9b8e5c01469adb8fbf83e3 (diff) | |
| parent | 5f44521242d2fdfa190206a6be40577a58a71ef9 (diff) | |
Merge tag 'pull-aspeed-20240617' of https://github.com/legoater/qemu into staging
aspeed queue:
* Add AST2700 support
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEoPZlSPBIlev+awtgUaNDx8/77KEFAmZvtLUACgkQUaNDx8/7
# 7KH8Ew/+K7OJYUsRhuLByLjaQ8kCsVdxMCFLtpCL9t6AgrMUXaI6WkkynPMKITQQ
# AHocO76TsWRMp962obnjvXgVRCrtvOI2W5jvgp1Gr554tW7YQClLiGhuf1FeORS9
# ZQhWryoC8vK8ymC7dAS5cyuiddWFUGC04P9lb9oXr88n6goZ1xRfKwM+RttgfCAm
# 79SsK7g3TS8QOWH1kQwIQZyJKzwrw7bTM3Ijv9NmVKa050zWquMRZQeY18fgO6Ae
# p/pGpkf4Bc5iv+kIXoI4UN7Cx74aZoKInQ+DA71gtCWh/s09j9PkvOAfKWYAozD+
# VSaLvw4rvhRxgbs1SjoiMb5dDjJhngfzLhJX/P2FD1LCHRk+/uxk3fDDp2AqvQ6z
# IuWPb8FgWHqeiigcXkTW1JgUS85quIbjWBxreIrQiq+zR50EQy49elMRhzJlKsqZ
# 3/ulk7xf+5M1+wS4bo7r8LPk5K8mFw9b4cxfnx0feZCjrl4ZfeWyDtaKzCAU0MJq
# KfpHo9R98imjVmcRWUouTaFow33OXheLdPFO8PofVnT38a4KIWlkin3zFMdTOAk+
# f8kWMPlXlRpKBYsjvP2aCpoY6CY8bHskdBH7xysM2W1FfKTw3dwZRpt4dgVPxqYj
# KZXiKxzwnC2gGi/wn+EdhZwYy1nNSZYGK8s+jxBXi2UBrwv4PpA=
# =TnR8
# -----END PGP SIGNATURE-----
# gpg: Signature made Sun 16 Jun 2024 08:59:49 PM PDT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-aspeed-20240617' of https://github.com/legoater/qemu:
MAINTAINERS: Add reviewers for ASPEED BMCs
docs:aspeed: Add AST2700 Evaluation board
test/avocado/machine_aspeed.py: Add AST2700 test case
aspeed/soc: fix incorrect dram size for AST2700
aspeed: Add an AST2700 eval board
aspeed/soc: Add AST2700 support
aspeed/intc: Add AST2700 support
aspeed/scu: Add AST2700 support
aspeed/smc: Add AST2700 support
aspeed/smc: support different memory region ops for SMC flash region
aspeed/smc: support 64 bits dma dram address
aspeed/smc: support dma start length and 1 byte length unit
aspeed/smc: correct device description
aspeed/sdmc: Add AST2700 support
aspeed/sdmc: fix coding style
aspeed/sdmc: remove redundant macros
aspeed/sli: Add AST2700 support
aspeed/wdt: Add AST2700 support
aspeed/smc: Reintroduce "dram-base" property for AST2700
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/hw/intc')
| -rw-r--r-- | include/hw/intc/aspeed_intc.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/include/hw/intc/aspeed_intc.h b/include/hw/intc/aspeed_intc.h new file mode 100644 index 0000000000..18cb43476c --- /dev/null +++ b/include/hw/intc/aspeed_intc.h @@ -0,0 +1,44 @@ +/* + * ASPEED INTC Controller + * + * Copyright (C) 2024 ASPEED Technology Inc. + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef ASPEED_INTC_H +#define ASPEED_INTC_H + +#include "hw/sysbus.h" +#include "qom/object.h" +#include "hw/or-irq.h" + +#define TYPE_ASPEED_INTC "aspeed.intc" +#define TYPE_ASPEED_2700_INTC TYPE_ASPEED_INTC "-ast2700" +OBJECT_DECLARE_TYPE(AspeedINTCState, AspeedINTCClass, ASPEED_INTC) + +#define ASPEED_INTC_NR_REGS (0x2000 >> 2) +#define ASPEED_INTC_NR_INTS 9 + +struct AspeedINTCState { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + MemoryRegion iomem; + uint32_t regs[ASPEED_INTC_NR_REGS]; + OrIRQState orgates[ASPEED_INTC_NR_INTS]; + qemu_irq output_pins[ASPEED_INTC_NR_INTS]; + + uint32_t enable[ASPEED_INTC_NR_INTS]; + uint32_t mask[ASPEED_INTC_NR_INTS]; + uint32_t pending[ASPEED_INTC_NR_INTS]; +}; + +struct AspeedINTCClass { + SysBusDeviceClass parent_class; + + uint32_t num_lines; + uint32_t num_ints; +}; + +#endif /* ASPEED_INTC_H */ |