diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2024-02-16 11:05:14 +0000 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2024-02-16 11:05:14 +0000 |
commit | da96ad4a6a2ef26c83b15fa95e7fceef5147269c (patch) | |
tree | 3780fdfeef4cb0a04dd2c5b3aa4e444adf38aac7 /include/hw/ide/ahci.h | |
parent | 8e31b744fdf2c5d933681e4128acee72a83af4b8 (diff) | |
parent | 9a4b35f57eefbfc6977ed47d1f19d839e9e4784d (diff) |
Merge tag 'hw-misc-20240215' of https://github.com/philmd/qemu into staging
Misc HW patch queue
- Remove unused MIPS SAAR* registers (Phil)
- Remove warning when testing the TC58128 NAND EEPROM (Peter)
- KConfig cleanups around ISA SuperI/O and MIPS (Paolo)
- QDev API uses sanitization (Philippe)
- Split AHCI model as PCI / SysBus (Philippe)
- Add SMP support to SPARC Leon3 board (Clément)
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXOUD4ACgkQ4+MsLN6t
# wN6gWRAAjf+6Z9VUvvHqZoaSJW49k+GRUelTI2tyN+eGfetAx9dk8aIbpbV1X12d
# pc56jsSi6ICT7baCegtxHszhYJr2e9A2QLCAOJt+Oz87kEGes3ONVVKAk7pwjKxt
# m8pmU3uXWgFvU6PoFBhGBa6LiZBulgLNXBUwzmEhc9PpPkR49ULdDp/qxtWvxOV5
# xYBktFlkiT+AvHq3QWCnDIaw+pH5ghEq9BI4xFOvvvqSqdHEqsGAaiKPa9Po0Gfz
# Ap9qsm4FxKxhGoeQWtAIP8TvN3pFFSXMysziP6Xt1rffKsvF9ioghGKRM6BgQfqD
# ZetjcFbcf7dQu3zZVy8ljYcymMxfZcWWVVq4CMC68lPQE97hz1CT3PJjgd77dKfi
# z60uRkOGaiPW5iIGT9+vdQxZ5K3HivKyjuHOdV8V4HnWO3oqgfDtNHn5RKed0qUg
# g1FoWriJGsDixdx1vd0EoH2/oTxy4HIsFv7a1OjiZyBLjO+EeEZ3+H9pqUHqBxva
# +Dv70z9F1sv5dzcUXH+oCgTbnKlJ90Q+e3vj0wGdlBncVsgIwbtgqYelhUEl+xJX
# Mu6KNUo5ANVP38ZKG0GSMCZHfcUjc5s+5rG55NbTN0HiF56a6D2KlQAuXdUsGE1J
# 7i4cwipJmfxzbdPDlSb3kBxm5pFexEk6nROF9kTHQj3ZBMMvIls=
# =nOX+
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 15 Feb 2024 17:56:14 GMT
# gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE
# gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
# Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20240215' of https://github.com/philmd/qemu: (56 commits)
hw/ide/ich9: Use AHCIPCIState typedef
hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h'
hw/ide/ahci: Remove SysbusAHCIState::num_ports field
hw/ide/ahci: Do not pass 'ports' argument to ahci_realize()
hw/ide/ahci: Convert AHCIState::ports to unsigned
hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs()
hw/ide/ahci: Inline ahci_get_num_ports()
hw/ide/ahci: Rename AHCI PCI function as 'pdev'
hw/ide/ahci: Expose AHCIPCIState structure
hw/i386/q35: Use DEVICE() cast macro with PCIDevice object
hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled
MAINTAINERS: Add myself as reviewer for TCG Plugins
MAINTAINERS: replace Fabien by myself as Leon3 maintainer
hw/sparc/leon3: Initialize GPIO before realizing CPU devices
hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu()
hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in()
hw/sparc/leon3: check cpu_id in the tiny bootloader
hw/sparc/leon3: implement multiprocessor
hw/sparc/leon3: remove SP initialization
target/sparc: implement asr17 feature for smp
...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'include/hw/ide/ahci.h')
-rw-r--r-- | include/hw/ide/ahci.h | 38 |
1 files changed, 3 insertions, 35 deletions
diff --git a/include/hw/ide/ahci.h b/include/hw/ide/ahci.h index 210e5e734c..ba31e75ff9 100644 --- a/include/hw/ide/ahci.h +++ b/include/hw/ide/ahci.h @@ -24,8 +24,7 @@ #ifndef HW_IDE_AHCI_H #define HW_IDE_AHCI_H -#include "hw/sysbus.h" -#include "qom/object.h" +#include "exec/memory.h" typedef struct AHCIDevice AHCIDevice; @@ -46,43 +45,12 @@ typedef struct AHCIState { MemoryRegion idp; /* Index-Data Pair I/O port space */ unsigned idp_offset; /* Offset of index in I/O port space */ uint32_t idp_index; /* Current IDP index */ - int32_t ports; + uint32_t ports; qemu_irq irq; AddressSpace *as; } AHCIState; -#define TYPE_ICH9_AHCI "ich9-ahci" -OBJECT_DECLARE_SIMPLE_TYPE(AHCIPCIState, ICH9_AHCI) - -int32_t ahci_get_num_ports(PCIDevice *dev); -void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd); - -#define TYPE_SYSBUS_AHCI "sysbus-ahci" -OBJECT_DECLARE_SIMPLE_TYPE(SysbusAHCIState, SYSBUS_AHCI) - -struct SysbusAHCIState { - /*< private >*/ - SysBusDevice parent_obj; - /*< public >*/ - - AHCIState ahci; - uint32_t num_ports; -}; - -#define TYPE_ALLWINNER_AHCI "allwinner-ahci" -OBJECT_DECLARE_SIMPLE_TYPE(AllwinnerAHCIState, ALLWINNER_AHCI) - -#define ALLWINNER_AHCI_MMIO_OFF 0x80 -#define ALLWINNER_AHCI_MMIO_SIZE 0x80 - -struct AllwinnerAHCIState { - /*< private >*/ - SysbusAHCIState parent_obj; - /*< public >*/ - - MemoryRegion mmio; - uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4]; -}; +void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd); #endif /* HW_IDE_AHCI_H */ |