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authorCorey Minyard <cminyard@mvista.com>2021-05-18 15:51:24 -0500
committerCorey Minyard <cminyard@mvista.com>2021-06-17 07:10:32 -0500
commit246f530cdb5a93b5da6db2c2fb00549b4081d943 (patch)
treeafabaef5474062ca556efb01ba48288f1754633e /include/hw/adc
parent38848ce565849e5b867a5e08022b3c755039c11a (diff)
adc: Move the zynq-xadc file to the adc directories
It's an ADC, put it where it belongs. Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Alistair Francis <alistair@alistair23.me> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Diffstat (limited to 'include/hw/adc')
-rw-r--r--include/hw/adc/zynq-xadc.h46
1 files changed, 46 insertions, 0 deletions
diff --git a/include/hw/adc/zynq-xadc.h b/include/hw/adc/zynq-xadc.h
new file mode 100644
index 0000000000..2017b7a803
--- /dev/null
+++ b/include/hw/adc/zynq-xadc.h
@@ -0,0 +1,46 @@
+/*
+ * Device model for Zynq ADC controller
+ *
+ * Copyright (c) 2015 Guenter Roeck <linux@roeck-us.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef ZYNQ_XADC_H
+#define ZYNQ_XADC_H
+
+#include "hw/sysbus.h"
+#include "qom/object.h"
+
+#define ZYNQ_XADC_MMIO_SIZE 0x0020
+#define ZYNQ_XADC_NUM_IO_REGS (ZYNQ_XADC_MMIO_SIZE / 4)
+#define ZYNQ_XADC_NUM_ADC_REGS 128
+#define ZYNQ_XADC_FIFO_DEPTH 15
+
+#define TYPE_ZYNQ_XADC "xlnx-zynq-xadc"
+OBJECT_DECLARE_SIMPLE_TYPE(ZynqXADCState, ZYNQ_XADC)
+
+struct ZynqXADCState {
+ /*< private >*/
+ SysBusDevice parent_obj;
+
+ /*< public >*/
+ MemoryRegion iomem;
+
+ uint32_t regs[ZYNQ_XADC_NUM_IO_REGS];
+ uint16_t xadc_regs[ZYNQ_XADC_NUM_ADC_REGS];
+ uint16_t xadc_read_reg_previous;
+ uint16_t xadc_dfifo[ZYNQ_XADC_FIFO_DEPTH];
+ uint16_t xadc_dfifo_entries;
+
+ struct IRQState *qemu_irq;
+
+};
+
+#endif /* ZYNQ_XADC_H */