diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2019-01-23 12:49:19 -0800 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2019-01-28 07:04:35 -0800 |
| commit | e77c89fb086a9bf09dd11f72e4cb2093b426f32b (patch) | |
| tree | 24e2ee4bc262c1ee2f2f853dea132d6e99e6326e /include/exec/cpu_ldst.h | |
| parent | 0a9a83d6bf9c42da05e46583e6a2ed11599ea089 (diff) | |
cputlb: Remove static tlb sizing
Now that all tcg backends support TCG_TARGET_IMPLEMENTS_DYN_TLB,
remove the define and the old code.
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'include/exec/cpu_ldst.h')
| -rw-r--r-- | include/exec/cpu_ldst.h | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/include/exec/cpu_ldst.h b/include/exec/cpu_ldst.h index 83b2907d86..d78041d7a0 100644 --- a/include/exec/cpu_ldst.h +++ b/include/exec/cpu_ldst.h @@ -135,7 +135,6 @@ static inline target_ulong tlb_addr_write(const CPUTLBEntry *entry) #endif } -#if TCG_TARGET_IMPLEMENTS_DYN_TLB /* Find the TLB index corresponding to the mmu_idx + address pair. */ static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx, target_ulong addr) @@ -149,19 +148,6 @@ static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) { return (env->tlb_mask[mmu_idx] >> CPU_TLB_ENTRY_BITS) + 1; } -#else -/* Find the TLB index corresponding to the mmu_idx + address pair. */ -static inline uintptr_t tlb_index(CPUArchState *env, uintptr_t mmu_idx, - target_ulong addr) -{ - return (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); -} - -static inline size_t tlb_n_entries(CPUArchState *env, uintptr_t mmu_idx) -{ - return CPU_TLB_SIZE; -} -#endif /* TCG_TARGET_IMPLEMENTS_DYN_TLB */ /* Find the TLB entry corresponding to the mmu_idx + address pair. */ static inline CPUTLBEntry *tlb_entry(CPUArchState *env, uintptr_t mmu_idx, |