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authorIgor Mammedov <imammedo@redhat.com>2020-02-19 11:09:09 -0500
committerPatchew Importer <importer@patchew.org>2020-02-19 16:49:57 +0000
commit8182d3d1f1868a982c7c1a76ee0bfcc8decfeb01 (patch)
treea7d51327514dd25d00e778992222741040b40c87 /hw
parentc9800965c1be6c39a39bd02dc323497e61b85356 (diff)
arm/xilinx_zynq: use memdev for RAM
memory_region_allocate_system_memory() API is going away, so replace it with memdev allocated MemoryRegion. The later is initialized by generic code, so board only needs to opt in to memdev scheme by providing MachineClass::default_ram_id and using MachineState::ram instead of manually initializing RAM memory region. Signed-off-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20200219160953.13771-36-imammedo@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/arm/xilinx_zynq.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index f548c44fbd..3d439a45d5 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -160,7 +160,6 @@ static void zynq_init(MachineState *machine)
{
ARMCPU *cpu;
MemoryRegion *address_space_mem = get_system_memory();
- MemoryRegion *ext_ram = g_new(MemoryRegion, 1);
MemoryRegion *ocm_ram = g_new(MemoryRegion, 1);
DeviceState *dev;
SysBusDevice *busdev;
@@ -190,9 +189,7 @@ static void zynq_init(MachineState *machine)
object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal);
/* DDR remapped to address zero. */
- memory_region_allocate_system_memory(ext_ram, NULL, "zynq.ext_ram",
- machine->ram_size);
- memory_region_add_subregion(address_space_mem, 0, ext_ram);
+ memory_region_add_subregion(address_space_mem, 0, machine->ram);
/* 256K of on-chip memory */
memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 * KiB,
@@ -318,6 +315,7 @@ static void zynq_machine_init(MachineClass *mc)
mc->no_sdcard = 1;
mc->ignore_memory_transaction_failures = true;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+ mc->default_ram_id = "zynq.ext_ram";
}
DEFINE_MACHINE("xilinx-zynq-a9", zynq_machine_init)