diff options
| author | Michael S. Tsirkin <mst@redhat.com> | 2024-08-01 03:44:18 -0400 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-08-01 04:32:00 -0400 |
| commit | 67f5b279fc72e43ccdee20a1a1e54cb51e24f06a (patch) | |
| tree | f9f07576270af321f2c737e4519ccd4045243e81 /hw | |
| parent | cc91ac0a7240dea713acc802d0c304163a1c15c6 (diff) | |
Revert "virtio-pci: Implement SR-IOV PF"
This reverts commit 3f868ffb0bae0c4feafabe34a371cded57fe3806.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/virtio/virtio-pci.c | 20 |
1 files changed, 5 insertions, 15 deletions
diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 0c8fcc5627..9534730bba 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1955,7 +1955,6 @@ static void virtio_pci_device_plugged(DeviceState *d, Error **errp) uint8_t *config; uint32_t size; VirtIODevice *vdev = virtio_bus_get_device(bus); - int16_t res; /* * Virtio capabilities present without @@ -2101,14 +2100,6 @@ static void virtio_pci_device_plugged(DeviceState *d, Error **errp) pci_register_bar(&proxy->pci_dev, proxy->legacy_io_bar_idx, PCI_BASE_ADDRESS_SPACE_IO, &proxy->bar); } - - res = pcie_sriov_pf_init_from_user_created_vfs(&proxy->pci_dev, - proxy->last_pcie_cap_offset, - errp); - if (res > 0) { - proxy->last_pcie_cap_offset += res; - virtio_add_feature(&vdev->host_features, VIRTIO_F_SR_IOV); - } } static void virtio_pci_device_unplugged(DeviceState *d) @@ -2196,7 +2187,7 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) if (pcie_port && pci_is_express(pci_dev)) { int pos; - proxy->last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE; + uint16_t last_pcie_cap_offset = PCI_CONFIG_SPACE_SIZE; pos = pcie_endpoint_cap_init(pci_dev, 0); assert(pos > 0); @@ -2216,9 +2207,9 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) pci_set_word(pci_dev->config + pos + PCI_PM_PMC, 0x3); if (proxy->flags & VIRTIO_PCI_FLAG_AER) { - pcie_aer_init(pci_dev, PCI_ERR_VER, proxy->last_pcie_cap_offset, + pcie_aer_init(pci_dev, PCI_ERR_VER, last_pcie_cap_offset, PCI_ERR_SIZEOF, NULL); - proxy->last_pcie_cap_offset += PCI_ERR_SIZEOF; + last_pcie_cap_offset += PCI_ERR_SIZEOF; } if (proxy->flags & VIRTIO_PCI_FLAG_INIT_DEVERR) { @@ -2243,9 +2234,9 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Error **errp) } if (proxy->flags & VIRTIO_PCI_FLAG_ATS) { - pcie_ats_init(pci_dev, proxy->last_pcie_cap_offset, + pcie_ats_init(pci_dev, last_pcie_cap_offset, proxy->flags & VIRTIO_PCI_FLAG_ATS_PAGE_ALIGNED); - proxy->last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF; + last_pcie_cap_offset += PCI_EXT_CAP_ATS_SIZEOF; } if (proxy->flags & VIRTIO_PCI_FLAG_INIT_FLR) { @@ -2272,7 +2263,6 @@ static void virtio_pci_exit(PCIDevice *pci_dev) bool pcie_port = pci_bus_is_express(pci_get_bus(pci_dev)) && !pci_bus_is_root(pci_get_bus(pci_dev)); - pcie_sriov_pf_exit(&proxy->pci_dev); msix_uninit_exclusive_bar(pci_dev); if (proxy->flags & VIRTIO_PCI_FLAG_AER && pcie_port && pci_is_express(pci_dev)) { |