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authorIsaku Yamahata <yamahata@valinux.co.jp>2011-01-20 16:21:38 +0900
committerMichael S. Tsirkin <mst@redhat.com>2011-01-20 15:33:05 +0200
commit4c92325b5196ebd34886174a80d2f9fac35a004f (patch)
tree573ee0ee5eadb2aab5af35f4231e6943bbca1b9d /hw
parent2991181aaa026d8b1444bfaa9c4bcd82065ba5a3 (diff)
pci: deassert intx on reset.
deassert intx on device reset. So far pci_device_reset() is used for system reset. In that case, interrupt controller is reset at the same time so that all irq is are deasserted. But now pci bus reset/flr is supported, and in that case irq needs to be disabled explicitly. Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/pci.c9
-rw-r--r--hw/pci.h2
2 files changed, 11 insertions, 0 deletions
diff --git a/hw/pci.c b/hw/pci.c
index c77f6e998a..1ffe428c5c 100644
--- a/hw/pci.c
+++ b/hw/pci.c
@@ -137,6 +137,14 @@ static void pci_update_irq_status(PCIDevice *dev)
}
}
+void pci_device_deassert_intx(PCIDevice *dev)
+{
+ int i;
+ for (i = 0; i < PCI_NUM_PINS; ++i) {
+ qemu_set_irq(dev->irq[i], 0);
+ }
+}
+
/*
* This function is called on #RST and FLR.
* FLR if PCI_EXP_DEVCTL_BCR_FLR is set
@@ -152,6 +160,7 @@ void pci_device_reset(PCIDevice *dev)
dev->irq_state = 0;
pci_update_irq_status(dev);
+ pci_device_deassert_intx(dev);
/* Clear all writeable bits */
pci_word_test_and_clear_mask(dev->config + PCI_COMMAND,
pci_get_word(dev->wmask + PCI_COMMAND) |
diff --git a/hw/pci.h b/hw/pci.h
index bc8d5bb3c7..0d2753f27e 100644
--- a/hw/pci.h
+++ b/hw/pci.h
@@ -264,6 +264,8 @@ void do_pci_info_print(Monitor *mon, const QObject *data);
void do_pci_info(Monitor *mon, QObject **ret_data);
void pci_bridge_update_mappings(PCIBus *b);
+void pci_device_deassert_intx(PCIDevice *dev);
+
static inline void
pci_set_byte(uint8_t *config, uint8_t val)
{