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author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-06-03 17:17:44 +0100 |
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committer | Peter Maydell <peter.maydell@linaro.org> | 2013-06-03 17:17:44 +0100 |
commit | b0b7ae6259e96e775315357c813b74e85637bf32 (patch) | |
tree | afc7d093052f987fbc4bb5d5cd7f035c89cead22 /hw/sd | |
parent | a66418f6f181ca6ee04e77896674253ff83db45e (diff) |
xilinx_spips: lqspi: Fix byte/misaligned access
The LQSPI bus attachment supports byte/halfword and misaligned
accesses. Fixed. Refactored the LQSPI cache to be byte-wise
instead of word wise accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Message-id: 5ec47b13563ad2d22105a1f26186d7756718394b.1369117359.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/sd')
0 files changed, 0 insertions, 0 deletions