diff options
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | 2013-06-03 17:17:45 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2013-06-03 17:17:45 +0100 |
| commit | 1d32c26f28d6e25f447b8ba40440c7d228ed4006 (patch) | |
| tree | 68417fe76820d930e271d591b9ee2d4d889a3259 /hw/sd/sdhci.c | |
| parent | 677ff2ae660b3a55f936a8836513cbab185f6e4f (diff) | |
sd/sdhci:ADMA: fix interrupt
The end of transfer check was occurring and potentially returning before
the interrupt flag was checked. This means the interrupt will be missed
if it occurs on the last packet. Fix by checking for the interrupt
before checking for the end of transfer.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Igor Mitsyanko <i.mitsyanko@gmail.com>
Message-id: 9969ec154777957ec738fc4e539d68e7494d0081.1369370934.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/sd/sdhci.c')
| -rw-r--r-- | hw/sd/sdhci.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 15345dc071..e64899cafb 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -730,6 +730,15 @@ static void sdhci_do_adma(SDHCIState *s) break; } + if (dscr.attr & SDHC_ADMA_ATTR_INT) { + DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr); + if (s->norintstsen & SDHC_NISEN_DMA) { + s->norintsts |= SDHC_NIS_DMA; + } + + sdhci_update_irq(s); + } + /* ADMA transfer terminates if blkcnt == 0 or by END attribute */ if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) && (s->blkcnt == 0)) || (dscr.attr & SDHC_ADMA_ATTR_END)) { @@ -752,15 +761,6 @@ static void sdhci_do_adma(SDHCIState *s) return; } - if (dscr.attr & SDHC_ADMA_ATTR_INT) { - DPRINT_L1("ADMA interrupt: admasysaddr=0x%lx\n", s->admasysaddr); - if (s->norintstsen & SDHC_NISEN_DMA) { - s->norintsts |= SDHC_NIS_DMA; - } - - sdhci_update_irq(s); - return; - } } /* we have unfinished business - reschedule to continue ADMA */ |