diff options
| author | Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> | 2011-02-25 12:13:38 +0100 |
|---|---|---|
| committer | Andrzej Zaborowski <balrog@zabor.org> | 2011-02-25 12:13:38 +0100 |
| commit | e1f8c729fa890c67bb4532f22c22ace6fb0e1aaf (patch) | |
| tree | 71a7936f73ce841cc41dbd90457ab87044c9fdbc /hw/pxa2xx_gpio.c | |
| parent | 3e1dbc3bd40338f19a2469feabd5f1dc5a4f5a9d (diff) | |
pxa2xx_pic: update to use qdev
Use qdev/sysbus framework to handle pxa2xx-pic. Instead of exposing IRQs
via array, reference them via qdev_get_gpio_in().
Patch has been modified by the committer.
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>
Diffstat (limited to 'hw/pxa2xx_gpio.c')
| -rw-r--r-- | hw/pxa2xx_gpio.c | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/hw/pxa2xx_gpio.c b/hw/pxa2xx_gpio.c index 789965d88b..200b0cfe3a 100644 --- a/hw/pxa2xx_gpio.c +++ b/hw/pxa2xx_gpio.c @@ -253,7 +253,7 @@ static CPUWriteMemoryFunc * const pxa2xx_gpio_writefn[] = { }; DeviceState *pxa2xx_gpio_init(target_phys_addr_t base, - CPUState *env, qemu_irq *pic, int lines) + CPUState *env, DeviceState *pic, int lines) { DeviceState *dev; @@ -263,9 +263,12 @@ DeviceState *pxa2xx_gpio_init(target_phys_addr_t base, qdev_init_nofail(dev); sysbus_mmio_map(sysbus_from_qdev(dev), 0, base); - sysbus_connect_irq(sysbus_from_qdev(dev), 0, pic[PXA2XX_PIC_GPIO_0]); - sysbus_connect_irq(sysbus_from_qdev(dev), 1, pic[PXA2XX_PIC_GPIO_1]); - sysbus_connect_irq(sysbus_from_qdev(dev), 2, pic[PXA2XX_PIC_GPIO_X]); + sysbus_connect_irq(sysbus_from_qdev(dev), 0, + qdev_get_gpio_in(pic, PXA2XX_PIC_GPIO_0)); + sysbus_connect_irq(sysbus_from_qdev(dev), 1, + qdev_get_gpio_in(pic, PXA2XX_PIC_GPIO_1)); + sysbus_connect_irq(sysbus_from_qdev(dev), 2, + qdev_get_gpio_in(pic, PXA2XX_PIC_GPIO_X)); return dev; } |