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author | Chenyi Qiang <chenyi.qiang@intel.com> | 2021-02-05 16:33:25 +0800 |
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committer | Paolo Bonzini <pbonzini@redhat.com> | 2021-02-08 15:15:32 +0100 |
commit | 52a44ad2b92ba4cd81c2b271cd5e4a2d820e91fc (patch) | |
tree | b7e98ea6f6ba0322c30d284ef17aa85fc654b84d /hw/ppc/prep_systemio.c | |
parent | 6aa4228bd68cb251ccb5f802c015b494c6a10f19 (diff) |
target/i386: Expose VMX entry/exit load pkrs control bits
Expose the VMX exit/entry load pkrs control bits in
VMX_TRUE_EXIT_CTLS/VMX_TRUE_ENTRY_CTLS MSRs to guest, which supports the
PKS in nested VM.
Signed-off-by: Chenyi Qiang <chenyi.qiang@intel.com>
Message-Id: <20210205083325.13880-3-chenyi.qiang@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'hw/ppc/prep_systemio.c')
0 files changed, 0 insertions, 0 deletions