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authorCédric Le Goater <clg@kaod.org>2022-08-09 17:38:43 +0200
committerDaniel Henrique Barboza <danielhb413@gmail.com>2022-08-31 14:08:06 -0300
commit041816c6d5e72896f3e829e8be6a80969c6cf047 (patch)
tree08a665b64b0ffe2daf9d83da3643b5f88735da60 /hw/ppc/ppc405_boards.c
parente67b374d0806d75b33bd4bf0fd6c0d6d7cd5e913 (diff)
ppc/ppc405: Move devices under the ref405ep machine
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220809153904.485018-4-clg@kaod.org> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Diffstat (limited to 'hw/ppc/ppc405_boards.c')
-rw-r--r--hw/ppc/ppc405_boards.c31
1 files changed, 19 insertions, 12 deletions
diff --git a/hw/ppc/ppc405_boards.c b/hw/ppc/ppc405_boards.c
index 96700be74d..f4794ba40c 100644
--- a/hw/ppc/ppc405_boards.c
+++ b/hw/ppc/ppc405_boards.c
@@ -230,13 +230,11 @@ static void boot_from_kernel(MachineState *machine, PowerPCCPU *cpu)
env->load_info = &boot_info;
}
-static void ref405ep_init(MachineState *machine)
+static void ppc405_init(MachineState *machine)
{
MachineClass *mc = MACHINE_GET_CLASS(machine);
const char *kernel_filename = machine->kernel_filename;
PowerPCCPU *cpu;
- DeviceState *dev;
- SysBusDevice *s;
MemoryRegion *sram = g_new(MemoryRegion, 1);
MemoryRegion *ram_memories = g_new(MemoryRegion, 2);
hwaddr ram_bases[2], ram_sizes[2];
@@ -294,15 +292,6 @@ static void ref405ep_init(MachineState *machine)
memory_region_add_subregion(sysmem, (uint32_t)(-bios_size), bios);
}
- /* Register FPGA */
- ref405ep_fpga_init(sysmem, PPC405EP_FPGA_BASE);
- /* Register NVRAM */
- dev = qdev_new("sysbus-m48t08");
- qdev_prop_set_int32(dev, "base-year", 1968);
- s = SYS_BUS_DEVICE(dev);
- sysbus_realize_and_unref(s, &error_fatal);
- sysbus_mmio_map(s, 0, PPC405EP_NVRAM_BASE);
-
/* Load kernel and initrd using U-Boot images */
if (kernel_filename && machine->firmware) {
target_ulong kernel_base, initrd_base;
@@ -335,6 +324,23 @@ static void ref405ep_init(MachineState *machine)
}
}
+static void ref405ep_init(MachineState *machine)
+{
+ DeviceState *dev;
+ SysBusDevice *s;
+
+ ppc405_init(machine);
+
+ /* Register FPGA */
+ ref405ep_fpga_init(get_system_memory(), PPC405EP_FPGA_BASE);
+ /* Register NVRAM */
+ dev = qdev_new("sysbus-m48t08");
+ qdev_prop_set_int32(dev, "base-year", 1968);
+ s = SYS_BUS_DEVICE(dev);
+ sysbus_realize_and_unref(s, &error_fatal);
+ sysbus_mmio_map(s, 0, PPC405EP_NVRAM_BASE);
+}
+
static void ref405ep_class_init(ObjectClass *oc, void *data)
{
MachineClass *mc = MACHINE_CLASS(oc);
@@ -354,6 +360,7 @@ static void ppc405_machine_class_init(ObjectClass *oc, void *data)
MachineClass *mc = MACHINE_CLASS(oc);
mc->desc = "PPC405 generic machine";
+ mc->init = ppc405_init;
mc->default_ram_size = 128 * MiB;
mc->default_ram_id = "ppc405.ram";
}