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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-04-28 10:31:03 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-04-28 10:31:03 +0100 |
| commit | da378d014d27fe3a243bd8e7e060e9eb8c1a272b (patch) | |
| tree | f6ae00c4b474a297c436330e1d2ddd2033992e8d /hw/pci/msi.c | |
| parent | 3d27b09cf6f62ec61c1330d0a811811a91e7514d (diff) | |
| parent | 4eb276408363aef5435a72a8e818f24220b5edd0 (diff) | |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150427' into staging
target-arm queue:
* memory system updates to support transaction attributes
* set user-mode and secure attributes for accesses made by ARM CPUs
* rename c1_coproc to cpacr_el1
* adjust id_aa64pfr0 when has_el3 CPU property disabled
* allow ARMv8 SCR.SMD updates
# gpg: Signature made Mon Apr 27 16:14:30 2015 BST using RSA key ID 14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
* remotes/pmaydell/tags/pull-target-arm-20150427:
Allow ARMv8 SCR.SMD updates
target-arm: Adjust id_aa64pfr0 when has_el3 CPU property disabled
target-arm: rename c1_coproc to cpacr_el1
target-arm: Check watchpoints against CPU security state
target-arm: Use attribute info to handle user-only watchpoints
target-arm: Add user-mode transaction attribute
target-arm: Use correct memory attributes for page table walks
target-arm: Honour NS bits in page tables
Switch non-CPU callers from ld/st*_phys to address_space_ld/st*
exec.c: Capture the memory attributes for a watchpoint hit
exec.c: Add new address_space_ld*/st* functions
exec.c: Make address_space_rw take transaction attributes
exec.c: Convert subpage memory ops to _with_attrs
Add MemTxAttrs to the IOTLB
Make CPU iotlb a structure rather than a plain hwaddr
memory: Replace io_mem_read/write with memory_region_dispatch_read/write
memory: Define API for MemoryRegionOps to take attrs and return status
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/pci/msi.c')
| -rw-r--r-- | hw/pci/msi.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/hw/pci/msi.c b/hw/pci/msi.c index 52d23130d9..916e1a1e5b 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -291,7 +291,8 @@ void msi_notify(PCIDevice *dev, unsigned int vector) "notify vector 0x%x" " address: 0x%"PRIx64" data: 0x%"PRIx32"\n", vector, msg.address, msg.data); - stl_le_phys(&dev->bus_master_as, msg.address, msg.data); + address_space_stl_le(&dev->bus_master_as, msg.address, msg.data, + MEMTXATTRS_UNSPECIFIED, NULL); } /* Normally called by pci_default_write_config(). */ |