aboutsummaryrefslogtreecommitdiff
path: root/hw/intc
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2021-02-21 19:52:58 +0000
committerPeter Maydell <peter.maydell@linaro.org>2021-02-21 19:52:58 +0000
commit00d8ba9e0d62ea1c7459c25aeabf9c8bb7659462 (patch)
tree188c7a650d48c12a9cf244575cdd13700471b584 /hw/intc
parent4115aec9af2a3de5fa89a0b1daa12debcd7741ff (diff)
parentcc2b4550115baf77d556341f17eb464d18953cee (diff)
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210221' into staging
MIPS patches queue - Drop redundant struct MemmapEntry (Bin) - Fix for Coverity CID 1438965 and 1438967 (Jiaxun) - Add MIPS bootloader API (Jiaxun) - Use MIPS bootloader API on fuloong2e and boston machines (Jiaxun) - Add PMON test for Loongson-3A1000 CPU (Jiaxun) - Convert to translator API (Philippe) - MMU cleanups (Philippe) - Promote 128-bit multimedia registers as global ones (Philippe) - Various cleanups/fixes on the VT82C686B southbridge (Zoltan) # gpg: Signature made Sun 21 Feb 2021 18:43:57 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * remotes/philmd-gitlab/tags/mips-20210221: (43 commits) vt82c686: Fix superio_cfg_{read,write}() functions vt82c686: Log superio_cfg unimplemented accesses vt82c686: Simplify by returning earlier vt82c686: Reduce indentation by returning early vt82c686: Remove index field of SuperIOConfig vt82c686: Move creation of ISA devices to the ISA bridge vt82c686: Simplify vt82c686b_realize() vt82c686: Make vt82c686b-pm an abstract base class and add vt8231-pm based on it vt82c686: Set user_creatable=false for VT82C686B_PM vt82c686: Fix up power management io base and config vt82c686: Correctly reset all registers to default values on reset vt82c686: Correct vt82c686-pm I/O size vt82c686: Make vt82c686-pm an I/O tracing region vt82c686: Fix SMBus IO base and configuration registers vt82c686: Reorganise code vt82c686: Move superio memory region to SuperIOConfig struct target/mips: Use GPR move functions in gen_HILO1_tx79() target/mips: Introduce gen_load_gpr_hi() / gen_store_gpr_hi() helpers target/mips: Rename 128-bit upper halve GPR registers target/mips: Promote 128-bit multimedia registers as global ones ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/intc')
-rw-r--r--hw/intc/loongson_liointc.c16
1 files changed, 13 insertions, 3 deletions
diff --git a/hw/intc/loongson_liointc.c b/hw/intc/loongson_liointc.c
index f823d484e0..cc11b544cb 100644
--- a/hw/intc/loongson_liointc.c
+++ b/hw/intc/loongson_liointc.c
@@ -41,7 +41,7 @@
#define R_IEN_CLR 0x2c
#define R_ISR_SIZE 0x8
#define R_START 0x40
-#define R_END 0x64
+#define R_END (R_START + R_ISR_SIZE * NUM_CORES)
struct loongson_liointc {
SysBusDevice parent_obj;
@@ -125,7 +125,12 @@ liointc_read(void *opaque, hwaddr addr, unsigned int size)
}
if (addr >= R_START && addr < R_END) {
- int core = (addr - R_START) / R_ISR_SIZE;
+ hwaddr offset = addr - R_START;
+ int core = offset / R_ISR_SIZE;
+
+ if (offset % R_ISR_SIZE) {
+ goto out;
+ }
r = p->per_core_isr[core];
goto out;
}
@@ -169,7 +174,12 @@ liointc_write(void *opaque, hwaddr addr,
}
if (addr >= R_START && addr < R_END) {
- int core = (addr - R_START) / R_ISR_SIZE;
+ hwaddr offset = addr - R_START;
+ int core = offset / R_ISR_SIZE;
+
+ if (offset % R_ISR_SIZE) {
+ goto out;
+ }
p->per_core_isr[core] = value;
goto out;
}