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authorPeter Maydell <peter.maydell@linaro.org>2020-09-10 18:38:51 +0100
committerPeter Maydell <peter.maydell@linaro.org>2020-10-01 15:31:00 +0100
commit0ae0326b984e77a55c224b7863071bd3d8951231 (patch)
tree2ec89f8faee13ce2fea173cb596ce4a0b3a1d2d5 /hw/intc/ioapic.c
parent37a712a0f969ca2df7f01182409a6c4825cebfb5 (diff)
target/arm: Replace ARM_FEATURE_PXN with ID_MMFR0.VMSA check
The ARM_FEATURE_PXN bit indicates whether the CPU supports the PXN bit in short-descriptor translation table format descriptors. This is indicated by ID_MMFR0.VMSA being at least 0b0100. Replace the feature bit with an ID register check, in line with our preference for ID register checks over feature bits. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200910173855.4068-2-peter.maydell@linaro.org
Diffstat (limited to 'hw/intc/ioapic.c')
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