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authorBui Quang Minh <minhquangbui99@gmail.com>2024-01-11 22:44:00 +0700
committerMichael S. Tsirkin <mst@redhat.com>2024-02-14 06:09:32 -0500
commit774204cf9874e58dc7fc13394a505452357750ad (patch)
tree0769e519412bc9f51a56669011770eb415bb433d /hw/intc/apic_common.c
parentb5ee0468e9d28c6bd47cce70f90b5032dd10ecc2 (diff)
apic, i386/tcg: add x2apic transitions
This commit adds support for x2APIC transitions when writing to MSR_IA32_APICBASE register and finally adds CPUID_EXT_X2APIC to TCG_EXT_FEATURES. The set_base in APICCommonClass now returns an integer to indicate error in execution. apic_set_base return -1 on invalid APIC state transition, accelerator can use this to raise appropriate exception. Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com> Message-Id: <20240111154404.5333-4-minhquangbui99@gmail.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/intc/apic_common.c')
-rw-r--r--hw/intc/apic_common.c13
1 files changed, 6 insertions, 7 deletions
diff --git a/hw/intc/apic_common.c b/hw/intc/apic_common.c
index 3c43ac9a1d..16ab40a35f 100644
--- a/hw/intc/apic_common.c
+++ b/hw/intc/apic_common.c
@@ -35,20 +35,19 @@
bool apic_report_tpr_access;
-void cpu_set_apic_base(DeviceState *dev, uint64_t val)
+int cpu_set_apic_base(DeviceState *dev, uint64_t val)
{
trace_cpu_set_apic_base(val);
if (dev) {
APICCommonState *s = APIC_COMMON(dev);
APICCommonClass *info = APIC_COMMON_GET_CLASS(s);
- /* switching to x2APIC, reset possibly modified xAPIC ID */
- if (!(s->apicbase & MSR_IA32_APICBASE_EXTD) &&
- (val & MSR_IA32_APICBASE_EXTD)) {
- s->id = s->initial_apic_id;
- }
- info->set_base(s, val);
+ /* Reset possibly modified xAPIC ID */
+ s->id = s->initial_apic_id;
+ return info->set_base(s, val);
}
+
+ return 0;
}
uint64_t cpu_get_apic_base(DeviceState *dev)