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authorPeter Maydell <peter.maydell@linaro.org>2024-02-16 11:05:14 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-02-16 11:05:14 +0000
commitda96ad4a6a2ef26c83b15fa95e7fceef5147269c (patch)
tree3780fdfeef4cb0a04dd2c5b3aa4e444adf38aac7 /hw/ide/ahci.c
parent8e31b744fdf2c5d933681e4128acee72a83af4b8 (diff)
parent9a4b35f57eefbfc6977ed47d1f19d839e9e4784d (diff)
Merge tag 'hw-misc-20240215' of https://github.com/philmd/qemu into staging
Misc HW patch queue - Remove unused MIPS SAAR* registers (Phil) - Remove warning when testing the TC58128 NAND EEPROM (Peter) - KConfig cleanups around ISA SuperI/O and MIPS (Paolo) - QDev API uses sanitization (Philippe) - Split AHCI model as PCI / SysBus (Philippe) - Add SMP support to SPARC Leon3 board (Clément) # -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmXOUD4ACgkQ4+MsLN6t # wN6gWRAAjf+6Z9VUvvHqZoaSJW49k+GRUelTI2tyN+eGfetAx9dk8aIbpbV1X12d # pc56jsSi6ICT7baCegtxHszhYJr2e9A2QLCAOJt+Oz87kEGes3ONVVKAk7pwjKxt # m8pmU3uXWgFvU6PoFBhGBa6LiZBulgLNXBUwzmEhc9PpPkR49ULdDp/qxtWvxOV5 # xYBktFlkiT+AvHq3QWCnDIaw+pH5ghEq9BI4xFOvvvqSqdHEqsGAaiKPa9Po0Gfz # Ap9qsm4FxKxhGoeQWtAIP8TvN3pFFSXMysziP6Xt1rffKsvF9ioghGKRM6BgQfqD # ZetjcFbcf7dQu3zZVy8ljYcymMxfZcWWVVq4CMC68lPQE97hz1CT3PJjgd77dKfi # z60uRkOGaiPW5iIGT9+vdQxZ5K3HivKyjuHOdV8V4HnWO3oqgfDtNHn5RKed0qUg # g1FoWriJGsDixdx1vd0EoH2/oTxy4HIsFv7a1OjiZyBLjO+EeEZ3+H9pqUHqBxva # +Dv70z9F1sv5dzcUXH+oCgTbnKlJ90Q+e3vj0wGdlBncVsgIwbtgqYelhUEl+xJX # Mu6KNUo5ANVP38ZKG0GSMCZHfcUjc5s+5rG55NbTN0HiF56a6D2KlQAuXdUsGE1J # 7i4cwipJmfxzbdPDlSb3kBxm5pFexEk6nROF9kTHQj3ZBMMvIls= # =nOX+ # -----END PGP SIGNATURE----- # gpg: Signature made Thu 15 Feb 2024 17:56:14 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'hw-misc-20240215' of https://github.com/philmd/qemu: (56 commits) hw/ide/ich9: Use AHCIPCIState typedef hw/ide/ahci: Move SysBus definitions to 'ahci-sysbus.h' hw/ide/ahci: Remove SysbusAHCIState::num_ports field hw/ide/ahci: Do not pass 'ports' argument to ahci_realize() hw/ide/ahci: Convert AHCIState::ports to unsigned hw/ide/ahci: Pass AHCI context to ahci_ide_create_devs() hw/ide/ahci: Inline ahci_get_num_ports() hw/ide/ahci: Rename AHCI PCI function as 'pdev' hw/ide/ahci: Expose AHCIPCIState structure hw/i386/q35: Use DEVICE() cast macro with PCIDevice object hw/i386/q35: Simplify pc_q35_init() since PCI is always enabled MAINTAINERS: Add myself as reviewer for TCG Plugins MAINTAINERS: replace Fabien by myself as Leon3 maintainer hw/sparc/leon3: Initialize GPIO before realizing CPU devices hw/sparc/leon3: Pass DeviceState opaque argument to leon3_start_cpu() hw/sparc/leon3: Pass DeviceState opaque argument to leon3_set_pil_in() hw/sparc/leon3: check cpu_id in the tiny bootloader hw/sparc/leon3: implement multiprocessor hw/sparc/leon3: remove SP initialization target/sparc: implement asr17 feature for smp ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/ide/ahci.c')
-rw-r--r--hw/ide/ahci.c29
1 files changed, 10 insertions, 19 deletions
diff --git a/hw/ide/ahci.c b/hw/ide/ahci.c
index 0eb83a6d46..54c9685495 100644
--- a/hw/ide/ahci.c
+++ b/hw/ide/ahci.c
@@ -36,6 +36,8 @@
#include "sysemu/dma.h"
#include "hw/ide/internal.h"
#include "hw/ide/pci.h"
+#include "hw/ide/ahci-pci.h"
+#include "hw/ide/ahci-sysbus.h"
#include "ahci_internal.h"
#include "trace.h"
@@ -1613,14 +1615,14 @@ void ahci_init(AHCIState *s, DeviceState *qdev)
"ahci-idp", 32);
}
-void ahci_realize(AHCIState *s, DeviceState *qdev, AddressSpace *as, int ports)
+void ahci_realize(AHCIState *s, DeviceState *qdev, AddressSpace *as)
{
qemu_irq *irqs;
int i;
s->as = as;
- s->ports = ports;
- s->dev = g_new0(AHCIDevice, ports);
+ assert(s->ports > 0);
+ s->dev = g_new0(AHCIDevice, s->ports);
ahci_reg_init(s);
irqs = qemu_allocate_irqs(ahci_irq_set, s, s->ports);
for (i = 0; i < s->ports; i++) {
@@ -1818,7 +1820,7 @@ const VMStateDescription vmstate_ahci = {
.version_id = 1,
.post_load = ahci_state_post_load,
.fields = (const VMStateField[]) {
- VMSTATE_STRUCT_VARRAY_POINTER_INT32(dev, AHCIState, ports,
+ VMSTATE_STRUCT_VARRAY_POINTER_UINT32(dev, AHCIState, ports,
vmstate_ahci_device, AHCIDevice),
VMSTATE_UINT32(control_regs.cap, AHCIState),
VMSTATE_UINT32(control_regs.ghc, AHCIState),
@@ -1826,7 +1828,7 @@ const VMStateDescription vmstate_ahci = {
VMSTATE_UINT32(control_regs.impl, AHCIState),
VMSTATE_UINT32(control_regs.version, AHCIState),
VMSTATE_UINT32(idp_index, AHCIState),
- VMSTATE_INT32_EQUAL(ports, AHCIState, NULL),
+ VMSTATE_UINT32_EQUAL(ports, AHCIState, NULL),
VMSTATE_END_OF_LIST()
},
};
@@ -1861,11 +1863,11 @@ static void sysbus_ahci_realize(DeviceState *dev, Error **errp)
{
SysbusAHCIState *s = SYSBUS_AHCI(dev);
- ahci_realize(&s->ahci, dev, &address_space_memory, s->num_ports);
+ ahci_realize(&s->ahci, dev, &address_space_memory);
}
static Property sysbus_ahci_properties[] = {
- DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, num_ports, 1),
+ DEFINE_PROP_UINT32("num-ports", SysbusAHCIState, ahci.ports, 1),
DEFINE_PROP_END_OF_LIST(),
};
@@ -1895,18 +1897,8 @@ static void sysbus_ahci_register_types(void)
type_init(sysbus_ahci_register_types)
-int32_t ahci_get_num_ports(PCIDevice *dev)
+void ahci_ide_create_devs(AHCIState *ahci, DriveInfo **hd)
{
- AHCIPCIState *d = ICH9_AHCI(dev);
- AHCIState *ahci = &d->ahci;
-
- return ahci->ports;
-}
-
-void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd)
-{
- AHCIPCIState *d = ICH9_AHCI(dev);
- AHCIState *ahci = &d->ahci;
int i;
for (i = 0; i < ahci->ports; i++) {
@@ -1915,5 +1907,4 @@ void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd)
}
ide_bus_create_drive(&ahci->dev[i].port, 0, hd[i]);
}
-
}