diff options
| author | Bernhard Beschow <shentey@gmail.com> | 2024-01-06 14:25:45 +0100 |
|---|---|---|
| committer | Michael S. Tsirkin <mst@redhat.com> | 2024-02-14 06:09:32 -0500 |
| commit | c2e6d7d8e7fc270a90c61944ef36574b1549ddcf (patch) | |
| tree | e55ab08a42f1b4df45b5561742419d3578be175b /hw/i386/x86.c | |
| parent | f22f3a92eb728497dcd0f43e31b9148992db99bd (diff) | |
hw/i386/x86: Fix PIC interrupt handling if APIC is globally disabled
QEMU populates the apic_state attribute of x86 CPUs if supported by real
hardware or if SMP is active. When handling interrupts, it just checks whether
apic_state is populated to route the interrupt to the PIC or to the APIC.
However, chapter 10.4.3 of [1] requires that:
When IA32_APIC_BASE[11] is 0, the processor is functionally equivalent to an
IA-32 processor without an on-chip APIC.
This means that when apic_state is populated, QEMU needs to check for the
MSR_IA32_APICBASE_ENABLE flag in addition. Implement this which fixes some
real-world BIOSes.
[1] Intel 64 and IA-32 Architectures Software Developer's Manual, Vol. 3A:
System Programming Guide, Part 1
Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Message-Id: <20240106132546.21248-3-shentey@gmail.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
Diffstat (limited to 'hw/i386/x86.c')
| -rw-r--r-- | hw/i386/x86.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/hw/i386/x86.c b/hw/i386/x86.c index 505f64f89c..684dce90e9 100644 --- a/hw/i386/x86.c +++ b/hw/i386/x86.c @@ -520,7 +520,7 @@ static void x86_nmi(NMIState *n, int cpu_index, Error **errp) CPU_FOREACH(cs) { X86CPU *cpu = X86_CPU(cs); - if (cpu->apic_state) { + if (cpu_is_apic_enabled(cpu->apic_state)) { apic_deliver_nmi(cpu->apic_state); } else { cpu_interrupt(cs, CPU_INTERRUPT_NMI); @@ -555,7 +555,7 @@ static void pic_irq_request(void *opaque, int irq, int level) X86CPU *cpu = X86_CPU(cs); trace_x86_pic_interrupt(irq, level); - if (cpu->apic_state && !kvm_irqchip_in_kernel() && + if (cpu_is_apic_enabled(cpu->apic_state) && !kvm_irqchip_in_kernel() && !whpx_apic_in_platform()) { CPU_FOREACH(cs) { cpu = X86_CPU(cs); |