diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2024-09-17 11:39:58 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2024-09-17 11:39:58 +0100 |
| commit | 6fe7fc96e74e00d44b52fddefc5d40a3b5e0faa0 (patch) | |
| tree | f562c36b34596e04ca5f4e7c6d2cfff54def0c65 /hw/gpio/aspeed_gpio.c | |
| parent | a765aa6501219548e8f88ba8eaae93142130df18 (diff) | |
| parent | a93bb519e683fd8f8d7945e5517fd5ad74cc41c0 (diff) | |
Merge tag 'pull-aspeed-20240916' of https://github.com/legoater/qemu into staging
aspeed queue:
* I2C support for AST2700
* Coverity fixes
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# gpg: Signature made Mon 16 Sep 2024 19:55:45 BST
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# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* tag 'pull-aspeed-20240916' of https://github.com/legoater/qemu:
machine_aspeed.py: Update to test I2C for AST2700
aspeed: Add tmp105 in i2c bus 0 for AST2700
aspeed/soc: Support I2C for AST2700
aspeed/soc: Introduce a new API to get the device irq
hw/i2c/aspeed: Add support for 64 bit addresses
hw/i2c/aspeed: Add support for Tx/Rx buffer 64 bit addresses
hw/i2c/aspeed: Add AST2700 support
hw/i2c/aspeed: Introduce a new dma_dram_offset attribute in AspeedI2Cbus
hw/i2c/aspeed: Support discontinuous poll buffer memory region of I2C bus
hw/i2c/aspeed: Introduce a new bus pool buffer attribute in AspeedI2Cbus
hw/i2c/aspeed: Support discontinuous register memory region of I2C bus
hw/gpio/aspeed_gpio: Avoid shift into sign bit
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/gpio/aspeed_gpio.c')
| -rw-r--r-- | hw/gpio/aspeed_gpio.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index 3e7b35cf4f..71756664dd 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -281,7 +281,7 @@ static void aspeed_gpio_update(AspeedGPIOState *s, GPIOSets *regs, diff &= mode_mask; if (diff) { for (gpio = 0; gpio < ASPEED_GPIOS_PER_SET; gpio++) { - uint32_t mask = 1 << gpio; + uint32_t mask = 1U << gpio; /* If the gpio needs to be updated... */ if (!(diff & mask)) { |