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authorPeter Maydell <peter.maydell@linaro.org>2021-09-01 17:45:38 +0100
committerPeter Maydell <peter.maydell@linaro.org>2021-09-01 17:45:38 +0100
commit079b1252e9de384385c9da910262312ec2e574c8 (patch)
treeb18dfec9ce1edd5412bac5bc612f0c2989eacb01 /hw/core/clock.c
parent4c41a1c595e1ce3fe29f3b7bb22ff7402be9c77d (diff)
parent683754c7b61f9e2ff098720ec80c9ab86c54663d (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210901' into staging
* Refactor M-profile systick to use Clocks instead of system_clock_scale global * clock: Provide builtin multiplier/divider * Add A64FX processor model * Enable MVE emulation in Cortex-M55 * hw: Add compat machines for 6.2 * hw/intc/arm_gicv3: Replace mis-used MEMTX_* constants by booleans * hw/arm/raspi: Remove deprecated raspi2/raspi3 aliases # gpg: Signature made Wed 01 Sep 2021 11:35:57 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210901: (51 commits) arm: Remove system_clock_scale global hw/timer/stellaris-gptm: Use Clock input instead of system_clock_scale hw/arm/stellaris: Split stellaris-gptm into its own file hw/arm/stellaris: Fix code style issues in GPTM code hw/timer/armv7m_systick: Use clock inputs instead of system_clock_scale hw/arm/msf2-soc: Wire up refclk hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property hw/arm/msf2_soc: Don't allocate separate MemoryRegions hw/arm/stellaris: Wire sysclk up to armv7m hw/arm/stellaris: split stellaris_sys_init() hw/arm/nrf51: Wire up sysclk hw/arm/stm32vldiscovery: Delete trailing blank line hw/arm/stm32f405: Wire up sysclk and refclk hw/arm/stm32f205: Wire up sysclk and refclk hw/arm/stm32f100: Wire up sysclk and refclk hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize clock: Provide builtin multiplier/divider hw/arm/mps2.c: Connect up armv7m clocks armsse: Wire up systick cpuclk clock hw/arm/armv7m: Create input clocks ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/core/clock.c')
-rw-r--r--hw/core/clock.c31
1 files changed, 27 insertions, 4 deletions
diff --git a/hw/core/clock.c b/hw/core/clock.c
index fc5a99683f..916875e07a 100644
--- a/hw/core/clock.c
+++ b/hw/core/clock.c
@@ -64,6 +64,15 @@ bool clock_set(Clock *clk, uint64_t period)
return true;
}
+static uint64_t clock_get_child_period(Clock *clk)
+{
+ /*
+ * Return the period to be used for child clocks, which is the parent
+ * clock period adjusted for for multiplier and divider effects.
+ */
+ return muldiv64(clk->period, clk->multiplier, clk->divider);
+}
+
static void clock_call_callback(Clock *clk, ClockEvent event)
{
/*
@@ -78,15 +87,16 @@ static void clock_call_callback(Clock *clk, ClockEvent event)
static void clock_propagate_period(Clock *clk, bool call_callbacks)
{
Clock *child;
+ uint64_t child_period = clock_get_child_period(clk);
QLIST_FOREACH(child, &clk->children, sibling) {
- if (child->period != clk->period) {
+ if (child->period != child_period) {
if (call_callbacks) {
clock_call_callback(child, ClockPreUpdate);
}
- child->period = clk->period;
+ child->period = child_period;
trace_clock_update(CLOCK_PATH(child), CLOCK_PATH(clk),
- CLOCK_PERIOD_TO_HZ(clk->period),
+ CLOCK_PERIOD_TO_HZ(child->period),
call_callbacks);
if (call_callbacks) {
clock_call_callback(child, ClockUpdate);
@@ -110,7 +120,7 @@ void clock_set_source(Clock *clk, Clock *src)
trace_clock_set_source(CLOCK_PATH(clk), CLOCK_PATH(src));
- clk->period = src->period;
+ clk->period = clock_get_child_period(src);
QLIST_INSERT_HEAD(&src->children, clk, sibling);
clk->source = src;
clock_propagate_period(clk, false);
@@ -133,10 +143,23 @@ char *clock_display_freq(Clock *clk)
return freq_to_str(clock_get_hz(clk));
}
+void clock_set_mul_div(Clock *clk, uint32_t multiplier, uint32_t divider)
+{
+ assert(divider != 0);
+
+ trace_clock_set_mul_div(CLOCK_PATH(clk), clk->multiplier, multiplier,
+ clk->divider, divider);
+ clk->multiplier = multiplier;
+ clk->divider = divider;
+}
+
static void clock_initfn(Object *obj)
{
Clock *clk = CLOCK(obj);
+ clk->multiplier = 1;
+ clk->divider = 1;
+
QLIST_INIT(&clk->children);
}