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authorStefan Hajnoczi <stefanha@redhat.com>2016-11-07 14:02:15 +0000
committerStefan Hajnoczi <stefanha@redhat.com>2016-11-07 14:02:15 +0000
commit207faf24c58859f5240f66bf6decc33b87a1776e (patch)
tree077b7005139b02e99476986b1af66242b12a5b7d /hw/char/cadence_uart.c
parent0ea3eb65e84c5d4665dbeee3e3e5ed56b43f7648 (diff)
parent9706e0162d2405218fd7376ffdf13baed8569a4b (diff)
Merge remote-tracking branch 'pm215/tags/pull-target-arm-20161107' into staging
target-arm queue: * bitbang_i2c: Handle NACKs from devices * Fix corruption of CPSR when SCTLR.EE is set * nvic: set pending status for not active interrupts * char: cadence: check baud rate generator and divider values # gpg: Signature made Mon 07 Nov 2016 10:43:07 AM GMT # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * pm215/tags/pull-target-arm-20161107: hw/i2c/bitbang_i2c: Handle NACKs from devices Fix corruption of CPSR when SCTLR.EE is set nvic: set pending status for not active interrupts char: cadence: check baud rate generator and divider values Message-id: 1478515653-6361-1-git-send-email-peter.maydell@linaro.org Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Diffstat (limited to 'hw/char/cadence_uart.c')
-rw-r--r--hw/char/cadence_uart.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/hw/char/cadence_uart.c b/hw/char/cadence_uart.c
index def34cd0d2..0215d6518d 100644
--- a/hw/char/cadence_uart.c
+++ b/hw/char/cadence_uart.c
@@ -1,6 +1,11 @@
/*
* Device model for Cadence UART
*
+ * Reference: Xilinx Zynq 7000 reference manual
+ * - http://www.xilinx.com/support/documentation/user_guides/ug585-Zynq-7000-TRM.pdf
+ * - Chapter 19 UART Controller
+ * - Appendix B for Register details
+ *
* Copyright (c) 2010 Xilinx Inc.
* Copyright (c) 2012 Peter A.G. Crosthwaite (peter.crosthwaite@petalogix.com)
* Copyright (c) 2012 PetaLogix Pty Ltd.
@@ -402,6 +407,16 @@ static void uart_write(void *opaque, hwaddr offset,
break;
}
break;
+ case R_BRGR: /* Baud rate generator */
+ if (value >= 0x01) {
+ s->r[offset] = value & 0xFFFF;
+ }
+ break;
+ case R_BDIV: /* Baud rate divider */
+ if (value >= 0x04) {
+ s->r[offset] = value & 0xFF;
+ }
+ break;
default:
s->r[offset] = value;
}