diff options
author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-11 00:04:49 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2007-11-11 00:04:49 +0000 |
commit | 9ee6e8bb853bdea7ef6c645a1a07aa55fd206aba (patch) | |
tree | 1cd430d3d9ac641c8550cfd8956dbcce1a4b9121 /hw/arm_sysctl.c | |
parent | ee4e83ed8ddc8dac572a0123398adf78b63014ae (diff) |
ARMv7 support.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3572 c046a42c-6fe2-441c-8c8c-71466251a162
Diffstat (limited to 'hw/arm_sysctl.c')
-rw-r--r-- | hw/arm_sysctl.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/hw/arm_sysctl.c b/hw/arm_sysctl.c index 468a494dbf..e3179e2a91 100644 --- a/hw/arm_sysctl.c +++ b/hw/arm_sysctl.c @@ -1,7 +1,7 @@ /* * Status and system control registers for ARM RealView/Versatile boards. * - * Copyright (c) 2006 CodeSourcery. + * Copyright (c) 2006-2007 CodeSourcery. * Written by Paul Brook * * This code is licenced under the GPL. @@ -200,6 +200,9 @@ void arm_sysctl_init(uint32_t base, uint32_t sys_id) return; s->base = base; s->sys_id = sys_id; + /* The MPcore bootloader uses these flags to start secondary CPUs. + We don't use a bootloader, so do this here. */ + s->flags = 3; iomemtype = cpu_register_io_memory(0, arm_sysctl_readfn, arm_sysctl_writefn, s); cpu_register_physical_memory(base, 0x00001000, iomemtype); |