aboutsummaryrefslogtreecommitdiff
path: root/hw/arm/xilinx_zynq.c
diff options
context:
space:
mode:
authorPeter Maydell <peter.maydell@linaro.org>2020-02-25 13:31:16 +0000
committerPeter Maydell <peter.maydell@linaro.org>2020-02-25 13:31:16 +0000
commitdb736e0437aa6fd7c1b7e4599c17f9619ab6b837 (patch)
treed34751ef2c77e5fbc83c19e814c4413b0fa2618a /hw/arm/xilinx_zynq.c
parent9a8abceb5f01d1066d3a1ac5a33aabcbaeec1860 (diff)
parent9e264985ff0bc86927b44b334bd504687f78659d (diff)
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* device_del fix (Julia) * FXAM fix (myself) * memdev refactoring (Igor) * memory region API cleanups (Peter, Philippe) * ioeventfd optimization (Stefan) * new WHPX maintainer (Sunil) * Large guest startup optimizations (Chen) # gpg: Signature made Tue 25 Feb 2020 12:42:24 GMT # gpg: using RSA key BFFBD25F78C7AE83 # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83 * remotes/bonzini/tags/for-upstream: (104 commits) WHPX: Assigning maintainer for Windows Hypervisor Platform accel/kvm: Check ioctl(KVM_SET_USER_MEMORY_REGION) return value target/i386: check for empty register in FXAM qdev-monitor: Forbid repeated device_del mem-prealloc: optimize large guest startup memory: batch allocate ioeventfds[] in address_space_update_ioeventfds() Avoid cpu_physical_memory_rw() with a constant is_write argument Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument exec: Let cpu_[physical]_memory API use a boolean 'is_write' argument Avoid address_space_rw() with a constant is_write argument Let address_space_rw() calls pass a boolean 'is_write' argument exec: Let address_space_unmap() use a boolean 'is_write' argument hw/virtio: Let vhost_memory_map() use a boolean 'is_write' argument hw/virtio: Let virtqueue_map_iovec() use a boolean 'is_write' argument hw/ide: Let the DMAIntFunc prototype use a boolean 'is_write' argument hw/ide/internal: Remove unused DMARestartFunc typedef Remove unnecessary cast when using the cpu_[physical]_memory API exec: Let the cpu_[physical]_memory API use void pointer arguments Remove unnecessary cast when using the address_space API hw/net: Avoid casting non-const pointer, use address_space_write() ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/xilinx_zynq.c')
-rw-r--r--hw/arm/xilinx_zynq.c20
1 files changed, 9 insertions, 11 deletions
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xilinx_zynq.c
index 3a0fa5b23f..3d439a45d5 100644
--- a/hw/arm/xilinx_zynq.c
+++ b/hw/arm/xilinx_zynq.c
@@ -158,16 +158,20 @@ static inline void zynq_init_spi_flashes(uint32_t base_addr, qemu_irq irq,
static void zynq_init(MachineState *machine)
{
- ram_addr_t ram_size = machine->ram_size;
ARMCPU *cpu;
MemoryRegion *address_space_mem = get_system_memory();
- MemoryRegion *ext_ram = g_new(MemoryRegion, 1);
MemoryRegion *ocm_ram = g_new(MemoryRegion, 1);
DeviceState *dev;
SysBusDevice *busdev;
qemu_irq pic[64];
int n;
+ /* max 2GB ram */
+ if (machine->ram_size > 2 * GiB) {
+ error_report("RAM size more than 2 GiB is not supported");
+ exit(EXIT_FAILURE);
+ }
+
cpu = ARM_CPU(object_new(machine->cpu_type));
/* By default A9 CPUs have EL3 enabled. This board does not
@@ -184,15 +188,8 @@ static void zynq_init(MachineState *machine)
&error_fatal);
object_property_set_bool(OBJECT(cpu), true, "realized", &error_fatal);
- /* max 2GB ram */
- if (ram_size > 0x80000000) {
- ram_size = 0x80000000;
- }
-
/* DDR remapped to address zero. */
- memory_region_allocate_system_memory(ext_ram, NULL, "zynq.ext_ram",
- ram_size);
- memory_region_add_subregion(address_space_mem, 0, ext_ram);
+ memory_region_add_subregion(address_space_mem, 0, machine->ram);
/* 256K of on-chip memory */
memory_region_init_ram(ocm_ram, NULL, "zynq.ocm_ram", 256 * KiB,
@@ -300,7 +297,7 @@ static void zynq_init(MachineState *machine)
sysbus_connect_irq(busdev, 0, pic[40 - IRQ_OFFSET]);
sysbus_mmio_map(busdev, 0, 0xF8007000);
- zynq_binfo.ram_size = ram_size;
+ zynq_binfo.ram_size = machine->ram_size;
zynq_binfo.nb_cpus = 1;
zynq_binfo.board_id = 0xd32;
zynq_binfo.loader_start = 0;
@@ -318,6 +315,7 @@ static void zynq_machine_init(MachineClass *mc)
mc->no_sdcard = 1;
mc->ignore_memory_transaction_failures = true;
mc->default_cpu_type = ARM_CPU_TYPE_NAME("cortex-a9");
+ mc->default_ram_id = "zynq.ext_ram";
}
DEFINE_MACHINE("xilinx-zynq-a9", zynq_machine_init)