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authorRichard Henderson <richard.henderson@linaro.org>2022-11-29 11:02:20 -0800
committerRichard Henderson <richard.henderson@linaro.org>2023-01-23 16:00:13 -1000
commit709bcd7da3f6b4655d910634a0d520fa1439df38 (patch)
tree0821e2ad11b9eac323836fc6313e107f2c4ea2b1 /hw/arm/virt.c
parent21199bfbef8b69305cf419e22a455e7a1923c4ba (diff)
tcg/loongarch64: Reorg goto_tb implementation
The old implementation replaces two insns, swapping between b <dest> nop and pcaddu18i tmp, <dest> jirl zero, tmp, <dest> & 0xffff There is a race condition in which a thread could be stopped at the jirl, i.e. with the top of the address loaded, and when restarted we have re-linked to a different TB, so that the top half no longer matches the bottom half. Note that while we never directly re-link to a different TB, we can link, unlink, and link again all while the stopped thread remains stopped. The new implementation replaces only one insn, swapping between b <dest> and pcadd tmp, <jmp_addr> falling through to load the address from tmp, and branch. Reviewed-by: WANG Xuerui <git@xen0n.name> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'hw/arm/virt.c')
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