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authorPeter Maydell <peter.maydell@linaro.org>2015-05-12 12:11:32 +0100
committerPeter Maydell <peter.maydell@linaro.org>2015-05-12 12:11:32 +0100
commit968bb75c348a401b85e08d5eb1887a3e6c3185f5 (patch)
tree9a7a773e344aa200cdc85a0edd41baaf73ce770b /hw/arm/vexpress.c
parent19fbe5084c1da6af95177c86e4cab64241d479a8 (diff)
parent5ae79fe825bedc89db8b6bde9d0ed0bb5d59558c (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150512' into staging
target-arm queue: * Support TZ and grouping in the GIC * hw/sd: sd_reset cleanup * armv7m_nvic: fix bug in systick device # gpg: Signature made Tue May 12 12:02:26 2015 BST using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20150512: hw/arm/highbank.c: Wire FIQ between CPU <> GIC hw/arm/vexpress.c: Wire FIQ between CPU <> GIC hw/arm/virt.c: Wire FIQ between CPU <> GIC hw/intc/arm_gic: Add grouping support to gic_update() hw/intc/arm_gic: Change behavior of IAR writes hw/intc/arm_gic: Change behavior of EOIR writes hw/intc/arm_gic: Handle grouping for GICC_HPPIR hw/intc/arm_gic: Restrict priority view hw/intc/arm_gic: Implement Non-secure view of RPR hw/intc/arm_gic: Make ICCICR/GICC_CTLR banked hw/intc/arm_gic: Make ICCBPR/GICC_BPR banked hw/intc/arm_gic: Make ICDDCR/GICD_CTLR banked hw/intc/arm_gic_kvm.c: Save and restore GICD_IGROUPRn state hw/intc/arm_gic: Add Interrupt Group Registers hw/intc/arm_gic: Switch to read/write callbacks with tx attributes hw/intc/arm_gic: Add Security Extensions property hw/intc/arm_gic: Create outbound FIQ lines hw/sd: Don't pass BlockBackend to sd_reset() armv7m_nvic: systick: Reload the RELOAD value and count down only if ENABLE bit is set Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'hw/arm/vexpress.c')
-rw-r--r--hw/arm/vexpress.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c
index 3989bc52b7..8f1a5ea992 100644
--- a/hw/arm/vexpress.c
+++ b/hw/arm/vexpress.c
@@ -253,6 +253,8 @@ static void init_cpus(const char *cpu_model, const char *privdev,
DeviceState *cpudev = DEVICE(qemu_get_cpu(n));
sysbus_connect_irq(busdev, n, qdev_get_gpio_in(cpudev, ARM_CPU_IRQ));
+ sysbus_connect_irq(busdev, n + smp_cpus,
+ qdev_get_gpio_in(cpudev, ARM_CPU_FIQ));
}
}