diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2023-07-25 10:56:51 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2023-07-25 10:56:51 +0100 |
commit | c6445544d4cea2628fbad3bad09f3d3a03c749d3 (patch) | |
tree | e6da816b57c81f11b43ed9b5cbcc83a0fe4ca1df /hw/arm/smmu-common.c | |
parent | 885fc169f09f5915ce037263d20a59eb226d473d (diff) |
hw/arm/smmu: Handle big-endian hosts correctly
The implementation of the SMMUv3 has multiple places where it reads a
data structure from the guest and directly operates on it without
doing a guest-to-host endianness conversion. Since all SMMU data
structures are little-endian, this means that the SMMU doesn't work
on a big-endian host. In particular, this causes the Avocado test
machine_aarch64_virt.py:Aarch64VirtMachine.test_alpine_virt_tcg_gic_max
to fail on an s390x host.
Add appropriate byte-swapping on reads and writes of guest in-memory
data structures so that the device works correctly on big-endian
hosts.
As part of this we constrain queue_read() to operate only on Cmd
structs and queue_write() on Evt structs, because in practice these
are the only data structures the two functions are used with, and we
need to know what the data structure is to be able to byte-swap its
parts correctly.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Tested-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Eric Auger <eric.auger@redhat.com>
Message-id: 20230717132641.764660-1-peter.maydell@linaro.org
Cc: qemu-stable@nongnu.org
Diffstat (limited to 'hw/arm/smmu-common.c')
-rw-r--r-- | hw/arm/smmu-common.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c index 5ab9d45d58..f35ae9aa22 100644 --- a/hw/arm/smmu-common.c +++ b/hw/arm/smmu-common.c @@ -216,8 +216,7 @@ static int get_pte(dma_addr_t baseaddr, uint32_t index, uint64_t *pte, dma_addr_t addr = baseaddr + index * sizeof(*pte); /* TODO: guarantee 64-bit single-copy atomicity */ - ret = dma_memory_read(&address_space_memory, addr, pte, sizeof(*pte), - MEMTXATTRS_UNSPECIFIED); + ret = ldq_le_dma(&address_space_memory, addr, pte, MEMTXATTRS_UNSPECIFIED); if (ret != MEMTX_OK) { info->type = SMMU_PTW_ERR_WALK_EABT; |