diff options
| author | Jim Wilson <jimw@sifive.com> | 2019-03-15 03:26:56 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-03-19 05:13:24 -0700 |
| commit | c670970dc069ebaf941a786f0608fca701dcf7d0 (patch) | |
| tree | ee765d1abd7765544d77e6d436a194318835b4d3 /gdb-xml/riscv-32bit-fpu.xml | |
| parent | 1a987a1d5faaff6c3616a857c111aa3fd9d40ffa (diff) | |
RISC-V: Add 64-bit gdb xml files.
Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Diffstat (limited to 'gdb-xml/riscv-32bit-fpu.xml')
| -rw-r--r-- | gdb-xml/riscv-32bit-fpu.xml | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/gdb-xml/riscv-32bit-fpu.xml b/gdb-xml/riscv-32bit-fpu.xml index 32a1dee415..1eaae9119e 100644 --- a/gdb-xml/riscv-32bit-fpu.xml +++ b/gdb-xml/riscv-32bit-fpu.xml @@ -44,7 +44,7 @@ <reg name="ft10" bitsize="32" type="ieee_single"/> <reg name="ft11" bitsize="32" type="ieee_single"/> - <reg name="fflags" bitsize="32" type="int"/> - <reg name="frm" bitsize="32" type="int"/> - <reg name="fcsr" bitsize="32" type="int"/> + <reg name="fflags" bitsize="32" type="int" regnum="66"/> + <reg name="frm" bitsize="32" type="int" regnum="67"/> + <reg name="fcsr" bitsize="32" type="int" regnum="68"/> </feature> |