From c670970dc069ebaf941a786f0608fca701dcf7d0 Mon Sep 17 00:00:00 2001
From: Jim Wilson <jimw@sifive.com>
Date: Fri, 15 Mar 2019 03:26:56 -0700
Subject: RISC-V: Add 64-bit gdb xml files.

Signed-off-by: Jim Wilson <jimw@sifive.com>
Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---
 gdb-xml/riscv-32bit-fpu.xml | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'gdb-xml/riscv-32bit-fpu.xml')

diff --git a/gdb-xml/riscv-32bit-fpu.xml b/gdb-xml/riscv-32bit-fpu.xml
index 32a1dee415..1eaae9119e 100644
--- a/gdb-xml/riscv-32bit-fpu.xml
+++ b/gdb-xml/riscv-32bit-fpu.xml
@@ -44,7 +44,7 @@
   <reg name="ft10" bitsize="32" type="ieee_single"/>
   <reg name="ft11" bitsize="32" type="ieee_single"/>
 
-  <reg name="fflags" bitsize="32" type="int"/>
-  <reg name="frm" bitsize="32" type="int"/>
-  <reg name="fcsr" bitsize="32" type="int"/>
+  <reg name="fflags" bitsize="32" type="int" regnum="66"/>
+  <reg name="frm" bitsize="32" type="int" regnum="67"/>
+  <reg name="fcsr" bitsize="32" type="int" regnum="68"/>
 </feature>
-- 
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