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authorRoque Arcudia Hernandez <roqueh@google.com>2024-11-19 13:02:06 +0000
committerPeter Maydell <peter.maydell@linaro.org>2024-11-19 13:02:06 +0000
commitb0a1009192d7dea0307734f691f693fd18ec3453 (patch)
treee3a5411dba77abb54725a1919d6e913930b87a6b /gdb-xml/avr-cpu.xml
parent9a0762c13283da7130cf27d174d5bbf4b7cc2acb (diff)
tests/qtest/cmsdk-apb-watchdog-test: Test INTEN as counter enable
The following tests focus on making sure the counter is not running out of reset and the proper use of INTEN as the counter enable. As described in: https://developer.arm.com/documentation/ddi0479/d/apb-components/apb-watchdog/programmers-model The new tests have to target an MPS2 machine because the original machine used by the test (stellaris) has a variation of the cmsdk_apb_watchdog that locks INTEN when it is programmed to 1. The stellaris machine also does not reproduce the problem of the counter running out of cold reset due to the way the clocks are initialized. Signed-off-by: Roque Arcudia Hernandez <roqueh@google.com> Reviewed-by: Stephen Longfield <slongfield@google.com> Message-id: 20241115160328.1650269-6-roqueh@google.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'gdb-xml/avr-cpu.xml')
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