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| author | Paolo Bonzini <pbonzini@redhat.com> | 2019-10-16 10:34:39 +0200 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2019-10-26 15:38:07 +0200 |
| commit | bf13bfab0840d34a74938ddf567d52e9010dbdc6 (patch) | |
| tree | 2743c5d7e769c7da29ddc7fcdb795a869514668e /fsdev/qemu-fsdev.c | |
| parent | 5caa1833d22c2f3c3f08c80d9bf86dccf9aa25a4 (diff) | |
i386: implement IGNNE
Change the handling of port F0h writes and FPU exceptions to implement IGNNE.
The implementation mixes a bit what the chipset and processor do in real
hardware, but the effect is the same as what happens with actual FERR#
and IGNNE# pins: writing to port F0h asserts IGNNE# in addition to lowering
FP_IRQ; while clearing the SE bit in the FPU status word deasserts IGNNE#.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Diffstat (limited to 'fsdev/qemu-fsdev.c')
0 files changed, 0 insertions, 0 deletions