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authorRichard Henderson <richard.henderson@linaro.org>2023-07-01 08:55:37 +0200
committerRichard Henderson <richard.henderson@linaro.org>2023-07-01 08:55:37 +0200
commitd145c0da22cde391d8c6672d33146ce306e8bf75 (patch)
tree4333862526cf2bee112cf3b226b2cbb013acfc9a /fpu/softfloat.c
parent408015a97dbe48a9dde8c0d2526c9312691952e7 (diff)
parent605a8b5491a119a2a6efbf61e5a38f9374645990 (diff)
Merge tag 'pull-tcg-20230701' of https://gitlab.com/rth7680/qemu into staging
dbus: Two hot fixes, per request of Marc-André Lureau accel/tcg: Fix tb_invalidate_phys_range iteration fpu: Add float64_to_int{32,64}_modulo tcg: Reduce scope of tcg_assert_listed_vecop target/nios2: Explicitly ask for target-endian loads linux-user: Avoid mmap of the last byte of the reserved_va # -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmSfzXwdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+GMAgAicMA7dZEUNiKT1co # pwQNF/aQehs3a+UYcHFZRQWjwNsXzDrPRTAyBkDFrzR2ILxKlpPw2JBRiqrr9pqj # YWit0pHVv/OAYfSEzcqUaIeWyAh2xlAT4IbSz+sLcPBdPgUwm3z0Y7mTz3kUAkB2 # gXO/iuoD8ORwgSnFvH+FSws16kr1x/8cAaObY7BupUhS7hK8M9zsCehhk6ssxv7+ # EpR0kDIeoC2kjJLvQAoGW4DPzfmAvVmI/OiJKpqrAlTJIeAkngalSuaxj/t9Dte6 # zy4h8JW5VbHw3qLxTvg42/Pk4AiweBh38hpUfLQ2cprO7dy+T9qS2v8CGnMzrmeB # kzlIMg== # =a7vA # -----END PGP SIGNATURE----- # gpg: Signature made Sat 01 Jul 2023 08:53:48 AM CEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate] * tag 'pull-tcg-20230701' of https://gitlab.com/rth7680/qemu: linux-user: Avoid mmap of the last byte of the reserved_va target/nios2 : Explicitly ask for target-endian loads and stores tcg: Reduce tcg_assert_listed_vecop() scope target/arm: Use float64_to_int32_modulo for FJCVTZS target/alpha: Use float64_to_int64_modulo for CVTTQ tests/tcg/alpha: Add test for cvttq fpu: Add float64_to_int{32,64}_modulo accel/tcg: Assert one page in tb_invalidate_phys_page_range__locked accel/tcg: Fix start page passed to tb_invalidate_phys_page_range__locked audio: dbus requires pixman ui/dbus: fix build errors in dbus_update_gl_cb and dbus_call_update_gl Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'fpu/softfloat.c')
-rw-r--r--fpu/softfloat.c31
1 files changed, 31 insertions, 0 deletions
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 42e6c188b4..0cc130ae9b 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -852,11 +852,24 @@ static uint64_t parts128_float_to_uint(FloatParts128 *p, FloatRoundMode rmode,
#define parts_float_to_uint(P, R, Z, M, S) \
PARTS_GENERIC_64_128(float_to_uint, P)(P, R, Z, M, S)
+static int64_t parts64_float_to_sint_modulo(FloatParts64 *p,
+ FloatRoundMode rmode,
+ int bitsm1, float_status *s);
+static int64_t parts128_float_to_sint_modulo(FloatParts128 *p,
+ FloatRoundMode rmode,
+ int bitsm1, float_status *s);
+
+#define parts_float_to_sint_modulo(P, R, M, S) \
+ PARTS_GENERIC_64_128(float_to_sint_modulo, P)(P, R, M, S)
+
static void parts64_sint_to_float(FloatParts64 *p, int64_t a,
int scale, float_status *s);
static void parts128_sint_to_float(FloatParts128 *p, int64_t a,
int scale, float_status *s);
+#define parts_float_to_sint(P, R, Z, MN, MX, S) \
+ PARTS_GENERIC_64_128(float_to_sint, P)(P, R, Z, MN, MX, S)
+
#define parts_sint_to_float(P, I, Z, S) \
PARTS_GENERIC_64_128(sint_to_float, P)(P, I, Z, S)
@@ -3409,6 +3422,24 @@ int64_t bfloat16_to_int64_round_to_zero(bfloat16 a, float_status *s)
return bfloat16_to_int64_scalbn(a, float_round_to_zero, 0, s);
}
+int32_t float64_to_int32_modulo(float64 a, FloatRoundMode rmode,
+ float_status *s)
+{
+ FloatParts64 p;
+
+ float64_unpack_canonical(&p, a, s);
+ return parts_float_to_sint_modulo(&p, rmode, 31, s);
+}
+
+int64_t float64_to_int64_modulo(float64 a, FloatRoundMode rmode,
+ float_status *s)
+{
+ FloatParts64 p;
+
+ float64_unpack_canonical(&p, a, s);
+ return parts_float_to_sint_modulo(&p, rmode, 63, s);
+}
+
/*
* Floating-point to unsigned integer conversions
*/