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authorHelge Deller <deller@gmx.de>2024-09-03 17:22:10 +0200
committerHelge Deller <deller@gmx.de>2024-09-03 22:08:22 +0200
commitead5078cf1a5f11d16e3e8462154c859620bcc7e (patch)
treef76b81850e7b2b2b207697ee91ca74e5cab1a492 /event-loop-base.c
parentfd1952d814da738ed107e05583b3e02ac11e88ff (diff)
target/hppa: Fix PSW V-bit packaging in cpu_hppa_get for hppa64
While adding hppa64 support, the psw_v variable got extended from 32 to 64 bits. So, when packaging the PSW-V bit from the psw_v variable for interrupt processing, check bit 31 instead the 63th (sign) bit. This fixes a hard to find Linux kernel boot issue where the loss of the PSW-V bit due to an ITLB interruption in the middle of a series of ds/addc instructions (from the divU milicode library) generated the wrong division result and thus triggered a Linux kernel crash. Link: https://lore.kernel.org/lkml/718b8afe-222f-4b3a-96d3-93af0e4ceff1@roeck-us.net/ Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Helge Deller <deller@gmx.de> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Guenter Roeck <linux@roeck-us.net> Fixes: 931adff31478 ("target/hppa: Update cpu_hppa_get/put_psw for hppa64") Cc: qemu-stable@nongnu.org # v8.2+
Diffstat (limited to 'event-loop-base.c')
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