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authorChalapathi V <chalapathi.v@linux.ibm.com>2024-06-26 04:05:27 -0500
committerNicholas Piggin <npiggin@gmail.com>2024-07-26 09:21:06 +1000
commitbb44dc48628e9168f16c460f778bbef7a91d7708 (patch)
tree4e61a8ed6e7f635365757b8497af0ffcbdbd2383 /disas
parent8d970f4162b8a388eef08ee37dab47a650e390ab (diff)
hw/ppc: SPI controller wiring to P10 chip
In this commit, create SPI controller on p10 chip and connect cs irq. The QOM tree of pnv-spi and seeprom are. /machine (powernv10-machine) /chip[0] (power10_v2.0-pnv-chip) /pib_spic[2] (pnv-spi) /pnv-spi-bus.2 (SSI) /xscom-spi[0] (memory-region) /machine (powernv10-machine) /peripheral-anon (container) /device[0] (25csm04) /WP#[0] (irq) /ssi-gpio-cs[0] (irq) (qemu) qom-get /machine/peripheral-anon /device[76] "parent_bus" "/machine/chip[0]/pib_spic[2]/pnv-spi-bus.2" Signed-off-by: Chalapathi V <chalapathi.v@linux.ibm.com> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
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