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| author | Peter Maydell <peter.maydell@linaro.org> | 2015-10-22 18:01:53 +0100 |
|---|---|---|
| committer | Peter Maydell <peter.maydell@linaro.org> | 2015-10-22 18:01:53 +0100 |
| commit | 6a6739de510706e1d337180d12be74ebbd0c7666 (patch) | |
| tree | 352b36dae09eceb997bdd64057083f6cf6c60a15 /disas/mips.c | |
| parent | b803894e2c4d744ccc113ca6cbe6654ec80c1dc6 (diff) | |
| parent | 89a82cd4b6a90fe117fa715e2abe51d5c607560c (diff) | |
Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20151021' into staging
Collected tcg backend patches
# gpg: Signature made Wed 21 Oct 2015 22:34:28 BST using RSA key ID 4DD0279B
# gpg: Good signature from "Richard Henderson <rth7680@gmail.com>"
# gpg: aka "Richard Henderson <rth@redhat.com>"
# gpg: aka "Richard Henderson <rth@twiddle.net>"
* remotes/rth/tags/pull-tcg-20151021:
cpu-exec: Add "nochain" debug flag
tcg/mips: Support r6 SEL{NE, EQ}Z instead of MOVN/MOVZ
tcg/mips: Support r6 multiply/divide encodings
tcg/mips: Support r6 JR encoding
tcg/mips: Add use_mips32r6_instructions definition
disas/mips: Add R6 jr/jr.hb to disassembler
tcg-opc.h: Simplify insn_start def
tcg/ppc: Prefer mask over andi.
tcg/ppc: Revise goto_tb implementation
tcg/ppc: Adjust exit_tb for change in prologue placement
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'disas/mips.c')
| -rw-r--r-- | disas/mips.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/disas/mips.c b/disas/mips.c index 01336a8385..bf0bbaf86a 100644 --- a/disas/mips.c +++ b/disas/mips.c @@ -2420,9 +2420,11 @@ const struct mips_opcode mips_builtin_opcodes[] = {"hibernate","", 0x42000023, 0xffffffff, 0, 0, V1 }, {"ins", "t,r,+A,+B", 0x7c000004, 0xfc00003f, WR_t|RD_s, 0, I33 }, {"jr", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, +{"jr", "s", 0x00000009, 0xfc1fffff, UBD|RD_s, 0, I32R6 }, /* jalr */ /* jr.hb is officially MIPS{32,64}R2, but it works on R1 as jr with the same hazard barrier effect. */ {"jr.hb", "s", 0x00000408, 0xfc1fffff, UBD|RD_s, 0, I32 }, +{"jr.hb", "s", 0x00000409, 0xfc1fffff, UBD|RD_s, 0, I32R6 }, /* jalr.hb */ {"j", "s", 0x00000008, 0xfc1fffff, UBD|RD_s, 0, I1 }, /* jr */ /* SVR4 PIC code requires special handling for j, so it must be a macro. */ |