diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2015-10-22 17:33:54 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2015-10-22 17:33:54 +0100 |
commit | b803894e2c4d744ccc113ca6cbe6654ec80c1dc6 (patch) | |
tree | aed47a20518d0623449f3c642bc69f5b4bdecea8 /disas.c | |
parent | ca3e40e233e87f7b29442311736a82da01c0df7b (diff) | |
parent | 0960be7cffa7b30189f2f0f76b1ac3c8115660f3 (diff) |
Merge remote-tracking branch 'remotes/afaerber/tags/qom-cpu-for-peter' into staging
QOM CPUState and X86CPU
* Adoption of CPUClass::disas_set_info() hook
# gpg: Signature made Thu 22 Oct 2015 17:11:24 BST using RSA key ID 3E7E013F
# gpg: Good signature from "Andreas Färber <afaerber@suse.de>"
# gpg: aka "Andreas Färber <afaerber@suse.com>"
* remotes/afaerber/tags/qom-cpu-for-peter:
disas: QOMify alpha specific disas setup
disas: QOMify mips specific disas setup
disas: QOMify sh4 specific disas setup
disas: QOMify lm32 specific disas setup
disas: QOMify sparc specific disas setup
disas: QOMify m68k specific disas setup
disas: QOMify moxie specific disas setup
disas: QOMify s390x specific disas setup
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Diffstat (limited to 'disas.c')
-rw-r--r-- | disas.c | 55 |
1 files changed, 0 insertions, 55 deletions
@@ -214,11 +214,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, s.info.mach = bfd_mach_i386_i386; } s.info.print_insn = print_insn_i386; -#elif defined(TARGET_SPARC) - s.info.print_insn = print_insn_sparc; -#ifdef TARGET_SPARC64 - s.info.mach = bfd_mach_sparc_v9b; -#endif #elif defined(TARGET_PPC) if ((flags >> 16) & 1) { s.info.endian = BFD_ENDIAN_LITTLE; @@ -235,29 +230,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code, } s.info.disassembler_options = (char *)"any"; s.info.print_insn = print_insn_ppc; -#elif defined(TARGET_M68K) - s.info.print_insn = print_insn_m68k; -#elif defined(TARGET_MIPS) -#ifdef TARGET_WORDS_BIGENDIAN - s.info.print_insn = print_insn_big_mips; -#else - s.info.print_insn = print_insn_little_mips; -#endif -#elif defined(TARGET_SH4) - s.info.mach = bfd_mach_sh4; - s.info.print_insn = print_insn_sh; -#elif defined(TARGET_ALPHA) - s.info.mach = bfd_mach_alpha_ev6; - s.info.print_insn = print_insn_alpha; -#elif defined(TARGET_S390X) - s.info.mach = bfd_mach_s390_64; - s.info.print_insn = print_insn_s390; -#elif defined(TARGET_MOXIE) - s.info.mach = bfd_arch_moxie; - s.info.print_insn = print_insn_moxie; -#elif defined(TARGET_LM32) - s.info.mach = bfd_mach_lm32; - s.info.print_insn = print_insn_lm32; #endif if (s.info.print_insn == NULL) { s.info.print_insn = print_insn_od_target; @@ -429,13 +401,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.info.mach = bfd_mach_i386_i386; } s.info.print_insn = print_insn_i386; -#elif defined(TARGET_ALPHA) - s.info.print_insn = print_insn_alpha; -#elif defined(TARGET_SPARC) - s.info.print_insn = print_insn_sparc; -#ifdef TARGET_SPARC64 - s.info.mach = bfd_mach_sparc_v9b; -#endif #elif defined(TARGET_PPC) if (flags & 0xFFFF) { /* If we have a precise definition of the instruction set, use it. */ @@ -451,26 +416,6 @@ void monitor_disas(Monitor *mon, CPUState *cpu, s.info.endian = BFD_ENDIAN_LITTLE; } s.info.print_insn = print_insn_ppc; -#elif defined(TARGET_M68K) - s.info.print_insn = print_insn_m68k; -#elif defined(TARGET_MIPS) -#ifdef TARGET_WORDS_BIGENDIAN - s.info.print_insn = print_insn_big_mips; -#else - s.info.print_insn = print_insn_little_mips; -#endif -#elif defined(TARGET_SH4) - s.info.mach = bfd_mach_sh4; - s.info.print_insn = print_insn_sh; -#elif defined(TARGET_S390X) - s.info.mach = bfd_mach_s390_64; - s.info.print_insn = print_insn_s390; -#elif defined(TARGET_MOXIE) - s.info.mach = bfd_arch_moxie; - s.info.print_insn = print_insn_moxie; -#elif defined(TARGET_LM32) - s.info.mach = bfd_mach_lm32; - s.info.print_insn = print_insn_lm32; #endif if (!s.info.print_insn) { monitor_printf(mon, "0x" TARGET_FMT_lx |