diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2022-01-08 09:37:59 -0800 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2022-01-08 09:37:59 -0800 |
commit | df722e33d5da26ea8604500ca8f509245a0ea524 (patch) | |
tree | d8c9e7ac6a042261fec8ba6e49eb5848c880b85f /bsd-user/arm/target_arch_cpu.h | |
parent | afe33262585565b64df706c62b4b0f6e0ad30c71 (diff) | |
parent | 18fe5d99f27fa7458724aa367e3c6784c36d5771 (diff) |
Merge tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu into staging
bsd-user: arm (32-bit) support
This series of patches brings in 32-bit arm support for bsd-user. It implements
all the bits needed to do image activation, signal handling, stack management
and threading. This allows us to get to the "Hello World" level. The arm and x86
code are now the same as in the bsd-user fork. For full context, the fork is at
https://github.com/qemu-bsd-user/qemu-bsd-user/tree/blitz (though the the recent
sig{bus,segv} needed updates are incomplete).
v5 changes:
o Moved to using the CPUArchState typedef and move
set_sigtramp_args, get_mcontext, set_mcontext, and
get_ucontext_sigreturn prototypes to
bsd-user/freebsd/target_os_ucontext.h
o Fix issues with arm's set_mcontext related to masking
and remove an unnecessary check.
We're down to only one hunk needing review:
bsd-user/arm/target_arch_signal.c: arm set_mcontext
Warnings that should be ignored:
o make checkpatch has a couple of complaints about the comments for the
signal trampoline, since it's a false positive IMHO.
WARNING: Block comments use a leading /* on a separate line
+ /* 8 */ sys_sigreturn,
WARNING: Block comments use a leading /* on a separate line
+ /* 9 */ sys_exit
# gpg: Signature made Fri 07 Jan 2022 11:36:37 PM PST
# gpg: using RSA key 2035F894B00AA3CF7CCDE1B76C1CD1287DB01100
# gpg: Good signature from "Warner Losh <wlosh@netflix.com>" [unknown]
# gpg: aka "Warner Losh <imp@bsdimp.com>" [unknown]
# gpg: aka "Warner Losh <imp@freebsd.org>" [unknown]
# gpg: aka "Warner Losh <imp@village.org>" [unknown]
# gpg: aka "Warner Losh <wlosh@bsdimp.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 2035 F894 B00A A3CF 7CCD E1B7 6C1C D128 7DB0 1100
* tag 'bsd-user-arm-pull-request' of gitlab.com:bsdimp/qemu: (37 commits)
bsd-user: add arm target build
bsd-user/freebsd/target_os_ucontext.h: Require TARGET_*CONTEXT_SIZE
bsd-user/arm/signal.c: arm get_ucontext_sigreturn
bsd-user/arm/signal.c: arm set_mcontext
bsd-user/arm/signal.c: arm get_mcontext
bsd-user/arm/signal.c: arm set_sigtramp_args
bsd-user/arm/target_arch_signal.h: Define size of *context_t
bsd-user/arm/target_arch_signal.h: arm machine context and trapframe for signals
bsd-user/arm/target_arch_signal.h: arm specific signal registers and stack
bsd-user/arm/target_arch_elf.h: arm get_hwcap2 impl
bsd-user/arm/target_arch_elf.h: arm get hwcap
bsd-user/arm/target_arch_elf.h: arm defines for ELF
bsd-user/arm/target_arch_thread.h: Routines to create and switch to a thread
bsd-user/arm/target_arch_sigtramp.h: Signal Trampoline for arm
bsd-user/arm/target_arch_vmparam.h: Parameters for arm address space
bsd-user/arm/target_arch_reg.h: Implement core dump register copying
bsd-user/arm/target_arch_cpu.h: Implement system call dispatch
bsd-user/arm/target_arch_cpu.h: Implement data abort exceptions
bsd-user/arm/target_arch_cpu.h: Implement trivial EXCP exceptions
bsd-user/arm/target_arch_cpu.h: Dummy target_cpu_loop implementation
...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'bsd-user/arm/target_arch_cpu.h')
-rw-r--r-- | bsd-user/arm/target_arch_cpu.h | 211 |
1 files changed, 211 insertions, 0 deletions
diff --git a/bsd-user/arm/target_arch_cpu.h b/bsd-user/arm/target_arch_cpu.h new file mode 100644 index 0000000000..c675419c30 --- /dev/null +++ b/bsd-user/arm/target_arch_cpu.h @@ -0,0 +1,211 @@ +/* + * arm cpu init and loop + * + * Copyright (c) 2013 Stacey D. Son + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef _TARGET_ARCH_CPU_H_ +#define _TARGET_ARCH_CPU_H_ + +#include "target_arch.h" + +#define TARGET_DEFAULT_CPU_MODEL "any" + +static inline void target_cpu_init(CPUARMState *env, + struct target_pt_regs *regs) +{ + int i; + + cpsr_write(env, regs->uregs[16], CPSR_USER | CPSR_EXEC, + CPSRWriteByInstr); + for (i = 0; i < 16; i++) { + env->regs[i] = regs->uregs[i]; + } +} + +static inline void target_cpu_loop(CPUARMState *env) +{ + int trapnr; + target_siginfo_t info; + unsigned int n; + CPUState *cs = env_cpu(env); + + for (;;) { + cpu_exec_start(cs); + trapnr = cpu_exec(cs); + cpu_exec_end(cs); + process_queued_cpu_work(cs); + switch (trapnr) { + case EXCP_UDEF: + { + /* See arm/arm/undefined.c undefinedinstruction(); */ + info.si_addr = env->regs[15]; + + /* illegal instruction */ + info.si_signo = TARGET_SIGILL; + info.si_errno = 0; + info.si_code = TARGET_ILL_ILLOPC; + queue_signal(env, info.si_signo, &info); + + /* TODO: What about instruction emulation? */ + } + break; + case EXCP_SWI: + case EXCP_BKPT: + { + /* + * system call + * See arm/arm/trap.c cpu_fetch_syscall_args() + */ + if (trapnr == EXCP_BKPT) { + if (env->thumb) { + env->regs[15] += 2; + } else { + env->regs[15] += 4; + } + } + n = env->regs[7]; + if (bsd_type == target_freebsd) { + int ret; + abi_ulong params = get_sp_from_cpustate(env); + int32_t syscall_nr = n; + int32_t arg1, arg2, arg3, arg4, arg5, arg6, arg7, arg8; + + /* See arm/arm/trap.c cpu_fetch_syscall_args() */ + if (syscall_nr == TARGET_FREEBSD_NR_syscall) { + syscall_nr = env->regs[0]; + arg1 = env->regs[1]; + arg2 = env->regs[2]; + arg3 = env->regs[3]; + get_user_s32(arg4, params); + params += sizeof(int32_t); + get_user_s32(arg5, params); + params += sizeof(int32_t); + get_user_s32(arg6, params); + params += sizeof(int32_t); + get_user_s32(arg7, params); + arg8 = 0; + } else if (syscall_nr == TARGET_FREEBSD_NR___syscall) { + syscall_nr = env->regs[0]; + arg1 = env->regs[2]; + arg2 = env->regs[3]; + get_user_s32(arg3, params); + params += sizeof(int32_t); + get_user_s32(arg4, params); + params += sizeof(int32_t); + get_user_s32(arg5, params); + params += sizeof(int32_t); + get_user_s32(arg6, params); + arg7 = 0; + arg8 = 0; + } else { + arg1 = env->regs[0]; + arg2 = env->regs[1]; + arg3 = env->regs[2]; + arg4 = env->regs[3]; + get_user_s32(arg5, params); + params += sizeof(int32_t); + get_user_s32(arg6, params); + params += sizeof(int32_t); + get_user_s32(arg7, params); + params += sizeof(int32_t); + get_user_s32(arg8, params); + } + ret = do_freebsd_syscall(env, syscall_nr, arg1, arg2, arg3, + arg4, arg5, arg6, arg7, arg8); + /* + * Compare to arm/arm/vm_machdep.c + * cpu_set_syscall_retval() + */ + if (-TARGET_EJUSTRETURN == ret) { + /* + * Returning from a successful sigreturn syscall. + * Avoid clobbering register state. + */ + break; + } + if (-TARGET_ERESTART == ret) { + env->regs[15] -= env->thumb ? 2 : 4; + break; + } + if ((unsigned int)ret >= (unsigned int)(-515)) { + ret = -ret; + cpsr_write(env, CPSR_C, CPSR_C, CPSRWriteByInstr); + env->regs[0] = ret; + } else { + cpsr_write(env, 0, CPSR_C, CPSRWriteByInstr); + env->regs[0] = ret; /* XXX need to handle lseek()? */ + /* env->regs[1] = 0; */ + } + } else { + fprintf(stderr, "qemu: bsd_type (= %d) syscall " + "not supported\n", bsd_type); + } + } + break; + case EXCP_INTERRUPT: + /* just indicate that signals should be handled asap */ + break; + case EXCP_PREFETCH_ABORT: + /* See arm/arm/trap.c prefetch_abort_handler() */ + case EXCP_DATA_ABORT: + /* See arm/arm/trap.c data_abort_handler() */ + info.si_signo = TARGET_SIGSEGV; + info.si_errno = 0; + /* XXX: check env->error_code */ + info.si_code = 0; + info.si_addr = env->exception.vaddress; + queue_signal(env, info.si_signo, &info); + break; + case EXCP_DEBUG: + { + + info.si_signo = TARGET_SIGTRAP; + info.si_errno = 0; + info.si_code = TARGET_TRAP_BRKPT; + info.si_addr = env->exception.vaddress; + queue_signal(env, info.si_signo, &info); + } + break; + case EXCP_ATOMIC: + cpu_exec_step_atomic(cs); + break; + case EXCP_YIELD: + /* nothing to do here for user-mode, just resume guest code */ + break; + default: + fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", + trapnr); + cpu_dump_state(cs, stderr, 0); + abort(); + } /* switch() */ + process_pending_signals(env); + } /* for (;;) */ +} + +static inline void target_cpu_clone_regs(CPUARMState *env, target_ulong newsp) +{ + if (newsp) { + env->regs[13] = newsp; + } + env->regs[0] = 0; +} + +static inline void target_cpu_reset(CPUArchState *cpu) +{ +} + +#endif /* !_TARGET_ARCH_CPU_H */ |