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authorMark Cave-Ayland <mark.cave-ayland@ilande.co.uk>2023-06-29 09:25:22 +0100
committerRichard Henderson <richard.henderson@linaro.org>2023-07-01 08:26:54 +0200
commite665cf72fe6357945fdbecf747dac58c0c7c7c66 (patch)
tree5a870bfeb29b38dbdda1fe3e059eb328abbe72a5 /accel
parent3307e08c6f142bb3d2406cfbc0ee19359748b51a (diff)
accel/tcg: Assert one page in tb_invalidate_phys_page_range__locked
Ensure that that both the start and last addresses are within the same guest page. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230629082522.606219-3-mark.cave-ayland@ilande.co.uk> [rth: Use tcg_debug_assert, simplify the expression] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
-rw-r--r--accel/tcg/tb-maint.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/accel/tcg/tb-maint.c b/accel/tcg/tb-maint.c
index 33ea1aadd1..9566224d18 100644
--- a/accel/tcg/tb-maint.c
+++ b/accel/tcg/tb-maint.c
@@ -1092,6 +1092,9 @@ tb_invalidate_phys_page_range__locked(struct page_collection *pages,
TranslationBlock *current_tb = retaddr ? tcg_tb_lookup(retaddr) : NULL;
#endif /* TARGET_HAS_PRECISE_SMC */
+ /* Range may not cross a page. */
+ tcg_debug_assert(((start ^ last) & TARGET_PAGE_MASK) == 0);
+
/*
* We remove all the TBs in the range [start, last].
* XXX: see if in some cases it could be faster to invalidate all the code