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authorRichard Henderson <richard.henderson@linaro.org>2024-10-04 14:57:20 -0700
committerRichard Henderson <richard.henderson@linaro.org>2024-10-13 11:27:03 -0700
commite5b063e81fd2b30aad1e9128238871c71b62a666 (patch)
treefe5437d101092a25cd446a4fdb721f5b66a0c55c /accel
parentc5809eee452b0393ca57763137344099912b354a (diff)
include/exec/memop: Introduce memop_atomicity_bits
Split out of mmu_lookup. Reviewed-by: Helge Deller <deller@gmx.de> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Diffstat (limited to 'accel')
-rw-r--r--accel/tcg/cputlb.c16
1 files changed, 2 insertions, 14 deletions
diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index a975fe5f89..35cda1e2b0 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1767,20 +1767,8 @@ static bool mmu_lookup(CPUState *cpu, vaddr addr, MemOpIdx oi,
* Device memory type require alignment.
*/
if (unlikely(flags & TLB_CHECK_ALIGNED)) {
- MemOp size = l->memop & MO_SIZE;
-
- switch (l->memop & MO_ATOM_MASK) {
- case MO_ATOM_NONE:
- size = MO_8;
- break;
- case MO_ATOM_IFALIGN_PAIR:
- case MO_ATOM_WITHIN16_PAIR:
- size = size ? size - 1 : 0;
- break;
- default:
- break;
- }
- if (addr & ((1 << size) - 1)) {
+ a_bits = memop_atomicity_bits(l->memop);
+ if (addr & ((1 << a_bits) - 1)) {
cpu_unaligned_access(cpu, addr, type, l->mmu_idx, ra);
}
}