diff options
author | Pranith Kumar <bobby.prani@gmail.com> | 2017-06-30 10:36:13 -0400 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2017-07-09 21:10:23 -1000 |
commit | b68686bd4bfeb70040b4099df993dfa0b4f37b03 (patch) | |
tree | 7e6c83c69cffd2680b5963276eb1b8ad5394a9dc /accel | |
parent | 23b7aa1d2af04ba57cc94f74d9f0ab25dce72fa0 (diff) |
tcg/aarch64: Use ADRP+ADD to compute target address
We use ADRP+ADD to compute the target address for goto_tb. This patch
introduces the NOP instruction which is used to align the above
instruction pair so that we can use one atomic instruction to patch
the destination offsets.
CC: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20170630143614.31059-2-bobby.prani@gmail.com>
Signed-off-by: Richard Henderson <rth@twiddle.net>
Diffstat (limited to 'accel')
-rw-r--r-- | accel/tcg/translate-all.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index dfb9f0de46..0caf80db75 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -504,7 +504,7 @@ static inline PageDesc *page_find(tb_page_addr_t index) #elif defined(__powerpc__) # define MAX_CODE_GEN_BUFFER_SIZE (32u * 1024 * 1024) #elif defined(__aarch64__) -# define MAX_CODE_GEN_BUFFER_SIZE (128ul * 1024 * 1024) +# define MAX_CODE_GEN_BUFFER_SIZE (2ul * 1024 * 1024 * 1024) #elif defined(__s390x__) /* We have a +- 4GB range on the branches; leave some slop. */ # define MAX_CODE_GEN_BUFFER_SIZE (3ul * 1024 * 1024 * 1024) |