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authorRichard Henderson <richard.henderson@linaro.org>2022-04-17 10:43:40 -0700
committerPeter Maydell <peter.maydell@linaro.org>2022-04-22 14:44:54 +0100
commitfe12080c5f96f077552de92eb44ea2bb0588f51f (patch)
treece167793f45d7155410304441b30897c9e695e85
parente01aa38d48babc21b62286e2435cb1d00bc82ae9 (diff)
target/arm: Simplify GEN_SHIFT in translate.c
Instead of computing tmp1 = shift & 0xff; dest = (tmp1 > 0x1f ? 0 : value) << (tmp1 & 0x1f) use tmpd = value << (shift & 0x1f); dest = shift & 0xe0 ? 0 : tmpd; which has a flatter dependency tree. Use tcg_constant_i32 while we're at it. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/translate.c18
1 files changed, 8 insertions, 10 deletions
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4d7886fa85..0c9d50d48d 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -552,16 +552,14 @@ static void gen_sbc_CC(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1)
#define GEN_SHIFT(name) \
static void gen_##name(TCGv_i32 dest, TCGv_i32 t0, TCGv_i32 t1) \
{ \
- TCGv_i32 tmp1, tmp2, tmp3; \
- tmp1 = tcg_temp_new_i32(); \
- tcg_gen_andi_i32(tmp1, t1, 0xff); \
- tmp2 = tcg_const_i32(0); \
- tmp3 = tcg_const_i32(0x1f); \
- tcg_gen_movcond_i32(TCG_COND_GTU, tmp2, tmp1, tmp3, tmp2, t0); \
- tcg_temp_free_i32(tmp3); \
- tcg_gen_andi_i32(tmp1, tmp1, 0x1f); \
- tcg_gen_##name##_i32(dest, tmp2, tmp1); \
- tcg_temp_free_i32(tmp2); \
+ TCGv_i32 tmpd = tcg_temp_new_i32(); \
+ TCGv_i32 tmp1 = tcg_temp_new_i32(); \
+ TCGv_i32 zero = tcg_constant_i32(0); \
+ tcg_gen_andi_i32(tmp1, t1, 0x1f); \
+ tcg_gen_##name##_i32(tmpd, t0, tmp1); \
+ tcg_gen_andi_i32(tmp1, t1, 0xe0); \
+ tcg_gen_movcond_i32(TCG_COND_NE, dest, tmp1, zero, zero, tmpd); \
+ tcg_temp_free_i32(tmpd); \
tcg_temp_free_i32(tmp1); \
}
GEN_SHIFT(shl)