diff options
| author | Richard Henderson <richard.henderson@linaro.org> | 2023-09-16 21:56:39 -0700 |
|---|---|---|
| committer | Richard Henderson <richard.henderson@linaro.org> | 2023-11-06 18:49:34 -0800 |
| commit | e9efd4bcdc5d94eb9e1bbc53e2d635438ba166a7 (patch) | |
| tree | a7f7b6b2009fa24a2ba02bc0eebc1e2c1a08268b | |
| parent | 84e224d4226001ed73b8da42e4ad155cf80b1eef (diff) | |
target/hppa: Decode d for cmpb instructions
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
| -rw-r--r-- | target/hppa/insns.decode | 9 | ||||
| -rw-r--r-- | target/hppa/translate.c | 12 |
2 files changed, 15 insertions, 6 deletions
diff --git a/target/hppa/insns.decode b/target/hppa/insns.decode index b185523021..fc327e2bb3 100644 --- a/target/hppa/insns.decode +++ b/target/hppa/insns.decode @@ -67,6 +67,7 @@ &rri_cf_d t r i cf d &rrb_c_f disp n c f r1 r2 +&rrb_c_d_f disp n c d f r1 r2 &rib_c_f disp n c f r i #### @@ -83,6 +84,8 @@ @rrb_cf ...... r2:5 r1:5 c:3 ........... n:1 . \ &rrb_c_f disp=%assemble_12 +@rrb_cdf ...... r2:5 r1:5 c:3 ........... n:1 . \ + &rrb_c_d_f disp=%assemble_12 @rib_cf ...... r:5 ..... c:3 ........... n:1 . \ &rib_c_f disp=%assemble_12 i=%im5_16 @@ -296,8 +299,10 @@ bb_imm 110001 p:5 r:5 c:1 1 d:1 ........... n:1 . disp=%assemble_12 movb 110010 ..... ..... ... ........... . . @rrb_cf f=0 movbi 110011 ..... ..... ... ........... . . @rib_cf f=0 -cmpb 100000 ..... ..... ... ........... . . @rrb_cf f=0 -cmpb 100010 ..... ..... ... ........... . . @rrb_cf f=1 +cmpb 100000 ..... ..... ... ........... . . @rrb_cdf d=0 f=0 +cmpb 100010 ..... ..... ... ........... . . @rrb_cdf d=0 f=1 +cmpb 100111 ..... ..... ... ........... . . @rrb_cdf d=1 f=0 +cmpb 101111 ..... ..... ... ........... . . @rrb_cdf d=1 f=1 cmpbi 100001 ..... ..... ... ........... . . @rib_cf f=0 cmpbi 100011 ..... ..... ... ........... . . @rib_cf f=1 diff --git a/target/hppa/translate.c b/target/hppa/translate.c index e326f63866..6cd06fbc0d 100644 --- a/target/hppa/translate.c +++ b/target/hppa/translate.c @@ -3091,11 +3091,10 @@ static bool trans_ldo(DisasContext *ctx, arg_ldo *a) } static bool do_cmpb(DisasContext *ctx, unsigned r, TCGv_reg in1, - unsigned c, unsigned f, unsigned n, int disp) + unsigned c, unsigned f, bool d, unsigned n, int disp) { TCGv_reg dest, in2, sv; DisasCond cond; - bool d = false; in2 = load_gpr(ctx, r); dest = tcg_temp_new(); @@ -3113,14 +3112,19 @@ static bool do_cmpb(DisasContext *ctx, unsigned r, TCGv_reg in1, static bool trans_cmpb(DisasContext *ctx, arg_cmpb *a) { + if (!ctx->is_pa20 && a->d) { + return false; + } nullify_over(ctx); - return do_cmpb(ctx, a->r2, load_gpr(ctx, a->r1), a->c, a->f, a->n, a->disp); + return do_cmpb(ctx, a->r2, load_gpr(ctx, a->r1), + a->c, a->f, a->d, a->n, a->disp); } static bool trans_cmpbi(DisasContext *ctx, arg_cmpbi *a) { nullify_over(ctx); - return do_cmpb(ctx, a->r, tcg_constant_reg(a->i), a->c, a->f, a->n, a->disp); + return do_cmpb(ctx, a->r, tcg_constant_reg(a->i), + a->c, a->f, false, a->n, a->disp); } static bool do_addb(DisasContext *ctx, unsigned r, TCGv_reg in1, |